On 2/4/2023 2:15 PM, Abdlerhman Abotaleb via gem5-users wrote:
How to enforce the TLB in the system emulated (SE) mode to always produce
Page Frame Number = Virtual Page Number.
I may want to try two things:
1. Don't disable the TLB but have PFN=VPN
2. Disable TLB , so addresses in the workload are physical addresses.
Thanks, a lot.
If you're simulated architecture is x86, then you could modify this line in
TLB::translate in src/arch/x86/tlb.cc:
if (m5reg.prot) {
to
if (m5reg.prot && 0) {
which forces "real mode", where the real (physical) address is the same as the
virtual address. I would assume a similar test could be found for other
processors.
If you don't want to change the code, then you need to get the m5reg.prot bit
set to 0. It comes from CR0 (control register 0), the PE (paging enable)
bit. I'm sure that's protected so you could not directly write it from user
mode.
I could not readily find any setting you can make to python model component
parameters to control this.
Regards - Eliot Moss
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