Hi, I think you should go through the 'Getting Started' guide on the web, it's very well written and it's updated. That will give you an idea of how to set up a RISCV or other RISC simulator. And, as I said, the develop branch of the repo contains changes to the RV32 implementation. Thus, if you are targeting RV32, then I think you should checkout that branch instead.
Regards, Juan On Thu, Jan 26, 2023 at 12:42 PM RTL Insn via gem5-users < gem5-users@gem5.org> wrote: > Hi, > Build the Gem5 for ARM architecture. > > On Thu, Jan 26, 2023 at 3:06 PM Ayan Ray via gem5-users < > gem5-users@gem5.org> wrote: > >> HI Juan/all, >> >> I am comparatively new to simulating with RISC ISA, can anybody point me >> to the steps for setup ? >> Thanks >> >> On Thu, Jan 26, 2023 at 5:01 PM Juan García Blanco <juanr...@gmail.com> >> wrote: >> >>> Hi, >>> >>> AFAIK, there are relevant changes to RV32 in the develop branch. You >>> might want to try using that branch. >>> >>> Regards, >>> Juan >>> >> _______________________________________________ >> gem5-users mailing list -- gem5-users@gem5.org >> To unsubscribe send an email to gem5-users-le...@gem5.org >> > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org >
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