Hi Zehan, Atomic memory accesses should not be used during the same simulation loop as timing accesses. I.e., you should not call "sendAtomic" on a port during the same simulation loop that you call "sendTiming". If there isn't a panic in that case, there probably should be.
If you want to get a value out of memory in 0 time (e.g., for debugging or to model a "perfect" hardware component) you can use *functional* accesses during the timing simulation. You can also exit the simulation loop and switch between timing and atomic modes. Cheers, Jason On Tue, Jul 5, 2022 at 9:56 PM Zehan Gao <z99...@uwaterloo.ca> wrote: > Hi All, > > I am building a simulated system with a control registers > port that only implemented recvAtomic function. The control port is > connected to the IOBridge, and the system is running in timing mode. There > is no problem to access the registers from CPU, but I wonder what the > system does with the delay? I believe the atomic port would be treated as a > timing port that has no delays. But is the delay of IOBridge and other > system buses counted? > > > > Thanks, > > Zehan > > > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org >
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