Hi Gabe, Thanks very much for your reply! I got answers to some of my questions.
1. I have tested all the CPU models in the SE mode. And found the following CPU models support sve code: AtomicSimpleCPU, DeriveO3CPU, MinorCPU, NonCachingSimpleCPU, O3CPU, TimingSimpleCPU, O3_ARM_v7a_3, and ex5_big. While the following two models do not support sve code: HPI, ex5_LITTLE. 2. I followed this link https://stackoverflow.com/questions/57692765/how-to-change-the-gem5-arm-sve-vector-length, and set the sve vector length successfully. SE mode: se.py --param 'system.cpu[:].isa[:].sve_vl_se = 2' FS mode: fs.py --param 'system.sve_vl = 2' 3. However, I got some problems simulating 435.gromacs from SPEC CPU 2006 using the FS mode. I downloaded the latest image files (aarch-system-20210904.tar.bz2 <http://dist.gem5.org/dist/v21-1/arm/aarch-system-20210904.tar.bz2>, ubuntu-18.04-arm64-docker.img.bz2 <http://dist.gem5.org/dist/v21-1/arm/disks/ubuntu-18.04-arm64-docker.img.bz2>) from this link: https://www.gem5.org/documentation/general_docs/fullsystem/guest_binaries. Then I booted the system up using the following command: ./build/ARM/get5.opt configs/example/fs.py --bootloader=binaries/boot.arm64 --kernel=binaries/vmlinux.arm64 --disk=ubuntu-18.04-arm64-docker.img --cpu-type=DerivO3CPU --mem-size="8GB" --param="system.sve_vl = 2" --caches When I ran 435.gromacs in the simulation, I always got the error: "malloc(): invalid size (unsorted)". Then the program "gromacs" is aborted. No matter what the input is, test/train/ref. Do you have any idea what the problem may be? Thanks very much! Gabe Black <gabe.bl...@gmail.com> 于2021年12月12日周日 13:12写道： > Hi Xiaokang. > > 1. All of those CPU models will be able to execute the same set of > instructions since they use the same instruction implementations. The HPI > CPU is really just the O3CPU with some of the configuration set a certain > way, I think. > 2. I don't know for sure, but there are some constants related to it in > src/arch/arm/regs/vec.hh. > 3. SE mode vs FS mode isn't really related to the benchmark's size, it's > more about how much the benchmark or other program depends on the operating > system, and how complex its interactions are. Also, SE mode is usually a > little simpler to set up since you don't need to build a disk image, get > the OS set up, etc, but FS is more realistic since it actually simulates > the OS components and hardware. > > Gabe > > On Wed, Dec 8, 2021 at 1:54 AM Xiaokang Fan via gem5-users < > gem5-users@gem5.org> wrote: > >> Hi guys, >> >> I am new to the gem5 simulator. I have a few questions about simulating >> ARM SVE using gem5: >> >> 1. Which cpu model should I use? DerivO3CPU, MinorCPU, O3CPU, HPI? Or >> another cpu model? >> 2. How do I set the sve vector length? >> 3. Which simulation mode should I use if I want to run some large >> benchmarks like spec, SE mode or FS mode? >> >> Thanks a lot! >> _______________________________________________ >> gem5-users mailing list -- gem5-users@gem5.org >> To unsubscribe send an email to gem5-users-le...@gem5.org >> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s > >
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