Thank you for the detailed answer, Giacomo. I think case (2) will cover what I want to do. (1) is ok, but since my instruction will load data from memory, the number of cycles will depend on where the source data is in the memory hierarchy and I'm not sure I'll be able to model all involved costs with pseudo-instructions. But it's good to have the alternative.
Implementing the instruction as one of the Arm HINT instructions and expecting for a NOP to be interpreted is not exactly what I want, because I need the execution of my kernel to actually be performed, not to be ignored (even when running in kvm, resulting in a proper state for when checkpoints are taken). Again, thanks for the guidance. _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
