[gem5-users] set cache line size under o3 cpu

[yangyuqing--- via gem5-users]

When I simulate o3 cpu, I find that I can not set cache line size to 32B. 
The command is ./build/RISCV/gem5.opt --outdir=output/riscv 
configs/example/se.py \
--cpu-type=DerivO3CPU --num-cpus=2 --cpu-clock=1.5GHz --caches --l2cache 
--l1d_size=16kB \
--l1i_size=16kB --l2_size=256kB --l1d_assoc=4 --l1i_assoc=4 --l2_assoc=16 
--cacheline_size=32 \
--mem-type=DDR4_2400_16x4 --mem-size=1GB \
-c ./tests/test-progs/hello/bin/riscv/linux/hello.
It causes errors like: build/RISCV/cpu/o3/fetch.cc:115: fatal: fetch buffer 
size (64 bytes) is greater than the cache block size (32 bytes). 
So how to change cache line size when using o3 cpu?
_______________________________________________
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s