I have the suspicion the problem is in the Gicv3 ITS doing DMAs to the coherent XBar without a cache controller. Could you disable it from V2? Otherwise you would need to put a cache between the ITS and the XBar
Let me know if it works, Giacomo Get Outlook for iOS<https://aka.ms/o0ukef> ________________________________ From: Ciro Santilli via gem5-users <gem5-users@gem5.org> Sent: Tuesday, July 28, 2020 8:30:47 AM To: gem5-users@gem5.org <gem5-users@gem5.org> Cc: Nathanael Premillieu <nathanael.premill...@huawei.com>; Ciro Santilli <ciro.santi...@arm.com> Subject: [gem5-users] Re: Current status of gem5 capabilities regarding multicores full system simulation Welcome back Nathanael! We put great importance on ARM Linux kernel boot, and we try to make it so that it either works or at least we have a bug report for it. I reproduce the problem with VExpress_GEM5_V2 but not VExpress_GEM5_V1, opening a but for V2 at: https://gem5.atlassian.net/browse/GEM5-706 Besides that, some notes: O3_ARM_v7a_3: does not sound like a good idea for aarch64 since v7 in name, not sure it has all functional units required. --dtb-file is not needed anymore unless you are hacking the DTB manually. Just remove that option to use DTB auto-generation which is more likely to work. The newly setup nightlies (thanks Bobby!) contain a two core O3 test that passed yesterday: https://jenkins.gem5.org/job/Nightly/17/artifact/tests/.testing-results/results.xml <testcase name="realview-o3-dual-ARM-x86_64-opt" classname="TestUID:tests/gem5/fs/linux/arm/test.py:realview-o3-dual-ARM-x86_64-opt:realview-o3-dual-ARM-x86_64-opt" status="Passed"> ________________________________ From: Nathanael Premillieu via gem5-users <gem5-users@gem5.org> Sent: Monday, July 27, 2020 6:52 PM To: gem5-users@gem5.org <gem5-users@gem5.org> Cc: Nathanael Premillieu <nathanael.premill...@huawei.com> Subject: [gem5-users] Current status of gem5 capabilities regarding multicores full system simulation Hi all, After a few years away, I’m back to gem5. I have to say a lot of things have changed, for the better, thank you all! I’m trying to assess what is the current state of gem5 regarding simulating configurations with multiples cores in a full system environment with the different cpu models. Especially with the Arm architecture and the classic memory model in a full system simulation using the O3CPU model. And what happens if you add SMT on top of that. I’ve looked at this page: https://www.gem5.org/documentation/benchmark_status/, but from what I can infer, those results are only valid for X86. I’ve tried for example to boot linux (using the kernel provided here: http://dist.gem5.org/dist/current/arm/aarch-system-201901106.tar.bz2 and the disk image here: http://dist.gem5.org/dist/current/arm/disks/aarch64-ubuntu-trusty-headless.img.bz2) but without success. But I don’t know if I’m doing something wrong or if I’m trying to do something that is unsupported for the moment. I’m using gem5 version v20.0.0.2 and here is my command line: $ build/ARM/gem5.opt configs/example/fs.py --kernel=binaries/vmlinux.arm64 --machine-type=VExpress_GEM5_V2 --dtb-file=system/arm/dt/armv8_gem5_v2_4cpu.dtb --disk-image=aarch64-ubuntu-trusty-headless.img --cpu-type=O3_ARM_v7a_3 --caches --l2cache -n 4 I get the following error: Assertion `reqLookupResult.it->first == line_addr' failed. Global frequency set at 1000000000000 ticks per second warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (512 Mbytes) info: kernel located at: binaries/vmlinux.arm64 warn: Highest ARM exception-level set to AArch32 but the workload is for AArch64. Assuming you wanted these to match. system.vncserver: Listening for connections on port 5900 system.terminal: Listening for connections on port 3456 system.realview.uart1.device: Listening for connections on port 3457 system.realview.uart2.device: Listening for connections on port 3458 system.realview.uart3.device: Listening for connections on port 3459 0: system.remote_gdb: listening for remote gdb on port 7000 0: system.remote_gdb: listening for remote gdb on port 7001 0: system.remote_gdb: listening for remote gdb on port 7002 0: system.remote_gdb: listening for remote gdb on port 7003 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80080000 info: Loading DTB file: system/arm/dt/armv8_gem5_v2_4cpu.dtb at address 0x88000000 **** REAL SIMULATION **** warn: Existing EnergyCtrl, but no enabled DVFSHandler found. info: Entering event queue @ 0. Starting simulation... warn: SCReg: Access to unknown device dcc0:site0:pos0:fn7:dev0 warn: instruction 'csdb' unimplemented warn: Gicv3Distributor::write(): setting ARE to 0 is not supported! gem5.opt: build/ARM/mem/snoop_filter.cc:165: void SnoopFilter::finishRequest(bool, Addr, bool): Assertion `reqLookupResult.it->first == line_addr' failed. Program aborted at tick 12946004000 I get the same error using only one core (–n 1). I’ve also tried with the current state of the develop branch (commit v20.0.0.3-290-gcef72adab) and I get the same error. Thanks, Nathanael IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
_______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
