Hi I want to explore different interconnects for chip-to-chips (coherence) as well as chip and memory using connections like point-to-point, bus, arbitration based etc (while in classical memory system I could only see bus based network possible and couldn’t find any examples of how to connect separate chips).
Need to make two types of systems with multiple chips, each chip has CPUs with L1s and shared L2. And then these chips connected to each other in QPI (Intel) like interconnects, while memory connections are: 1. Seperate memory connected to each chip. NUMA like system. 2. Shared Memory between chips. UMA like system. As I'll try to make my own fs.py, how do you define a point-to-point network between two chips? Do you connect L2s with each other? If someone could direct me towards the right files to start from? Will need to be able to define the latency and bandwidth of the link. Would it be advisable to use ruby as I use ARM ISA and have heard it isn’t completely compatible? Thanks Arastu _______________________________________________ gem5-users mailing list -- [email protected] To unsubscribe send an email to [email protected] %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
