Hi Taiyu, Looks like you have a single memory controller with 2 ranks instantiated.
* The log flags labeled system.mem_ctrls are for general controller messages * The log flags labeled system.mem_ctrls_0 relate to rank 0 specific info * The log flags labeled system.mem_ctrls_1 relate to rank 1 specific info The messages in the log file included are for DRAM maintenance operations, specifically a refresh command. This is required periodically to maintain the bit cell contents. The messages seem to be occurring at the normal intervals, with the delays that are defined for a DDR3 device. The refresh command takes 260ns and is issued every 7.8us, which is in-line with the DDR3 configuration and DRAM requirements. What is missing is read/write activity in between these refresh operations. It appears that the controller is not receiving any read/write requests but more info is needed to fully debug. Thanks, Wendy From: Taiyu Zhou via gem5-users <gem5-users@gem5.org> Reply-To: gem5 users mailing list <gem5-users@gem5.org> Date: Friday, July 10, 2020 at 4:18 AM To: "gem5-users@gem5.org" <gem5-users@gem5.org> Cc: Taiyu Zhou <645505...@qq.com> Subject: [gem5-users] Infinite loop in memory controller Hi guys！ I run a Muti-thread program in gem5 with O3CPU but it will not exit. ./build/X86/gem5.opt --debug-flags=DRAM,BaseXBar,DRAMState,DRAMPower configs/example/se.py \ --cpu-type=DerivO3CPU --sys-clock=4GHz \ -c /home/ubuntu/taiyu/test_app/sps_t -o 2 -n 3 \ --caches --l2cache --l1d_size=64kB --l1i_size=32kB --l2_size=2048kB --l2_assoc=8 --mem-size=16GB And I found there is infinite loop in it. “ 198144750000: system.mem_ctrls: QoS Turnarounds selected state READ 198144750000: system.mem_ctrls: Rank 0 is not available 198144750000: system.mem_ctrls_0: Scheduling power event at 198144750000 to state 0 198144750000: system.mem_ctrls_0: Refresh done at 198144750000 and next refresh at 198152290000 198144750000: system.mem_ctrls_0: Was refreshing for 260000 ticks 198144750000: system.mem_ctrls_0: Scheduling next request after refreshing rank 0 198144750000: system.mem_ctrls_0: All banks precharged 198144750000: system.mem_ctrls: QoS Turnarounds selected state READ 198152276250: system.mem_ctrls_0: Refresh due 198152276250: system.mem_ctrls_0: All banks already precharged, starting refresh 198152276250: system.mem_ctrls_0: Scheduling power event at 198152276250 to state 1 198152276250: system.mem_ctrls_0: Refreshing 198152276250: system.mem_ctrls_0: 158521821,REF,0,0 198152276250: system.mem_ctrls_1: Refresh due 198152276250: system.mem_ctrls_1: All banks already precharged, starting refresh 198152276250: system.mem_ctrls_1: Scheduling power event at 198152276250 to state 1 198152276250: system.mem_ctrls_1: Refreshing 198152276250: system.mem_ctrls_1: 158521821,REF,0,1 198152536250: system.mem_ctrls_1: Scheduling power event at 198152536250 to state 0 198152536250: system.mem_ctrls_1: Refresh done at 198152536250 and next refresh at 198160076250 198152536250: system.mem_ctrls_1: Was refreshing for 260000 ticks 198152536250: system.mem_ctrls_1: Scheduling next request after refreshing rank 1 198152536250: system.mem_ctrls_1: All banks precharged 198152536250: system.mem_ctrls: QoS Turnarounds selected state READ 198152536250: system.mem_ctrls: Rank 0 is not available 198152536250: system.mem_ctrls_0: Scheduling power event at 198152536250 to state 0 198152536250: system.mem_ctrls_0: Refresh done at 198152536250 and next refresh at 198160076250 198152536250: system.mem_ctrls_0: Was refreshing for 260000 ticks 198152536250: system.mem_ctrls_0: Scheduling next request after refreshing rank 0 198152536250: system.mem_ctrls_0: All banks precharged 198152536250: system.mem_ctrls: QoS Turnarounds selected state READ 198160062500: system.mem_ctrls_0: Refresh due 198160062500: system.mem_ctrls_0: All banks already precharged, starting refresh 198160062500: system.mem_ctrls_0: Scheduling power event at 198160062500 to state 1 198160062500: system.mem_ctrls_0: Refreshing 198160062500: system.mem_ctrls_0: 158528050,REF,0,0 198160062500: system.mem_ctrls_1: Refresh due 198160062500: system.mem_ctrls_1: All banks already precharged, starting refresh 198160062500: system.mem_ctrls_1: Scheduling power event at 198160062500 to state 1 198160062500: system.mem_ctrls_1: Refreshing 198160062500: system.mem_ctrls_1: 158528050,REF,0,1 “ And are there any hint about why this infinite loop happen？What this event is doing？ Why are there three memory controller system.mem_ctrls, system.mem_ctrls_0 and system.mem_ctrls_1? IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
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