Hi guys!
I am trying to expand some functions to flush all dirty blk form Cache to
memory.My plan is below :
In BaseCache::recvTimingReq function.I use wb_pkts to store all writeback
pkt.The my_memWriteback will traverse all cacheblk and return the number of
dirty.For each blk it will call my_writebackVisitor to make new paket and put
it into wb_pkts.But I meet bug and don't know what's going on. The bug says
that "panic: Tried to read unmapped address 0x8.PC: 0x400ffa, Instr:
MOV_R_M : ld rax, DS:[rax + 0x8]PacketList wb_pkts". And I
run with --debug-flags=DRAM,Cache will see that cache never sends paket to
memory controller.
My expanding code shows below
wb_pkts.clear();
dirty_blk_count = my_memWriteback(wb_pkts);
bool satisfied = false;
{
PacketList writebacks;
satisfied = access(pkt, blk, lat, writebacks);
.....
int
BaseCache::my_memWriteback(PacketList &wb_pkts)
{
int count = 0;
tags->forEachBlk([this,&count,&wb_pkts](CacheBlk
&blk) mutable{
if(blk.isDirty()){
if(blk.isValid()){
count++;
}
}
my_writebackVisitor(blk,wb_pkts);
});
//printf("NmemWriteback count:%d\n",count);
return count;
}
BaseCache::my_writebackVisitor(CacheBlk &blk,PacketList &writebacks)
{
if (blk.isDirty()) {
assert(blk.isValid());
RequestPtr request = std::make_shared<Request>(
regenerateBlkAddr(&blk), blkSize,
0, Request::funcMasterId);
request->taskId(blk.task_id);
if (blk.isSecure()) {
request->setFlags(Request::SECURE);
}
PacketPtr packet = new Packet(request,
MemCmd::WriteReq);
packet->allocate();
std::memcpy(packet->getPtr<uint8_t>(),
blk.data, blkSize);
// packet->dataStatic(blk.data);
writebacks.push_back(packet);
//memSidePort.sendTimingReq(&packet);
blk.status &= ~BlkDirty;
}
}
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