Hello, I am simulating an OoO architecture using AArch64 and FS timing mode. I need to clarify which register index represents the register that is stored to the memory, when a store instruction is executed. Is there any way to be aware of which source register (index) is the one that represents the register to be stored?
While trying to clarify that I investigated the following: In file /src/arch/arm/isa/insts/str64.isa one can find all possible store instructions, and then find their decoded form in /src/arch/arm/isa/formats/aarch64.isa by searching their name (for instance "STRW64"). Also, in the generated files one can see in detail the implementation of the instructions (/build/ARM/arch/arm/generated/exec-ns.cc.inc). A typical store instruction calls the "writeMemTiming", with argument "Mem". This function is implemented in the file src/arch/generic/memhelpers.hh, where w e see that "mem" represents the actual data that will be stored in the "addr" space. Moreover, again in the generated file, we see that in typical stores, a "XDest" variable is defined and reads the data from the source register index 1, and then it is assigned to the aforementioned variable "Mem" that will be transfered to the memory. However, in floating point this is not the case, because misc registers are involved, and the stored data are read from a different index than 1. And also, in cases of store pairs (sdp) two different registers are stored to a double address space, but this could be adapted if there would be a norm for the others. So, from the above I try to extract a formula that could define which source register is the one to be stored. I would be grateful if someone knows something better to share it with me. Thank you very much in advance and sorry for the long-complicated mail. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France
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