Hi Muzamil, I would suggest adding a new SimObject that is a "memory-side prefetcher". You can either insert it in the interconnect between the LLC and the memory controller (e.g., as a MemObject), or you could make it a parameter to the crossbar like the probe filter.
Jason On Thu, Apr 6, 2017 at 8:08 PM Muzamil Rafique <[email protected]> wrote: > Hi All, > > I am trying to implement prefetching but only feature available currently > is CPU side prefetching where prefetchers are implemented in caches. How > can I implement prefetchers in memory controller? Should I include and > instantiate existing prefetchers available, in memory controller > implementation in DRAMCtrl.py or define a separate prefetcher object for > memory controller? > > Please help!!! > > Thanks > Muzamil > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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