Hey Lorenzo,
Just to see if I understand your question, you want to have uncacheable
address range 0x10000-0xFFFFF in physical memory and not virtual memory?
I hope you realize that accesses to physical memory not actually mapped to
DRAM is only allowed for devices. I am guessing that you don't just want
memory in that range, for which you simply have to increase the memory size
(using --mem-size=2GB, if you are using example scripts).
For having an uncacheable region (for devices), you could try this - in
src/arch/arm/process.cc, in ArmLiveProcess32/64::initState()
MultiLevelPageTable<PageTableOps> *pt =
dynamic_cast<MultiLevelPageTable<PageTableOps> *>(pTable);
pt->map(<Virtual Address>, <Physical Address>, <Region Size>, <bool
cacheable>);
Check out src/mem/pagetable.hh for the map function, and
src/arch/x86/process.cc and src/sim/process.cc for more information about
this.
Cheers,
Swapnil Haria,
Graduate Student,
Dept of Computer Sciences,
University of Wisconsin-Madison
On Fri, Nov 18, 2016 at 3:47 AM, Lorenzo Zuolo <[email protected]> wrote:
> Hi everybody,
>
> I have a very stupid question.
> I'm new in gem5 and I would like to understand how to make an address
> region uncacheable with ARM architecture in se mode.
> Problem is. I would like to have the possibility to access an address
> outside the dram range from a c program I'm executing in SE mode.
> Example is:
> Dram range is [0x0-0xFFFF]
> Desired address region is: [0x10000-0xFFFFF]
>
> In the c program I'm running on the core I would like to be able to do
> something like this:
>
> int main {
> char *reg=(char*)0x10000 //pointer to non cacheable memory region
>
> printf("value is %d\n",*reg);
> }
>
> Any thought on that?
>
> Thanks in advance
>
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> [email protected]
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>
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