Hi Monir, As Jason mentioned this happens (on all ISAs) because of an unimplemented instruction. If you look at arch/sparc/isa/decoder.isa you’ll find a line like FailUnimp::for(). What is missing here is the implementation of the for instruction. You should be able to find a definition for it in the UltraSPARC 2005 reference manual. With that definition you should be able to write an implementation which would look something like the surrounding implemented instructions. I imagine this is floating point logical or so which probably (untested, don’t expect it to work) looks like: FpBasic::for({{Frd_udw = Frs1_udw | Frs2_udw;}}); After you have an implementation it generally helps to write a small test program with those instructions in it and to check if they do what you expect.
Ali > On Sep 7, 2016, at 10:02 AM, Jason Lowe-Power <ja...@lowepower.com> wrote: > > Hi Monir, > > No, I don't have any good suggestions for you. Too bad you're not inside ARM. > I bet they have something internally ;) (note: I have no knowledge of what > ARM may or may not be doing internally). > > Another (semi-)sarcastic response: It may be less effort to add the RISC-V > ISA to gem5 than to get SPARC working. That is definitely something the gem5 > community would get excited about! Plus, it seems that the RTL models for > RISC-V cores are only going to get better, especially compared to SPARC cores. > > Sorry I can't be more help. > > Jason > > On Wed, Sep 7, 2016 at 9:47 AM Zaman, Monir <monir.za...@utdallas.edu > <mailto:monir.za...@utdallas.edu>> wrote: > Thanks Jason. You are right, too many times the struggle is with the ISA of > choice in my case. > > > > But, I need something which I can model in GEM5 and also have synthesizable > RTL available to play with. Any idea? > > > > /Monir > > > > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org <mailto:gem5-users@gem5.org> > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > <http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users>_______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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