Hello Dan, Were you able to model the SPARC processor in GEM5? If so, what config have you used? I am trying to model the SPARC T1, and so far figured the InOrder Detailed CPU (MinoCPU) doesn’t seem to work for SPARC architecture in SE mode.
Thanks Monir Zaman _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
