Following link has pretty detailed conversation on this topic: https://www.mail-archive.com/gem5-users@gem5.org/msg12864.html
-- Ayaz On Thu, Jul 14, 2016 at 1:07 PM, Murat Koksal <mmkok...@mtu.edu> wrote: > Hello, > > In ./cpu/o3/O3CPU.py for DerivO3CPU the number of cache ports is given as > 200. Is that the number of cache ports available to the CPU for sending > requests? I'm guessing it is not, because I have never heard of such a > cache. But I can't think of what else it could be. The number definitely > affects how many loads/stores are serviced every cycle. I would appreciate > some help, I'm very confused. > > Thanks. > -Murat. > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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