Hello, If you want your pipe to perform two memory operations per cycle, you can increase the number of load/store execution ports (functional units). The pipe should also have enough buffering structs to support the extra multi-issues loads/stores (e.g. LSQs, MSHRs, WBs). I'm not aware if the cache component limits the number of accesses per cycle, but in my opinion this is the way to go.
Regards, -- Fernando A. Endo, PhD student and researcher Université de Grenoble, UJF France 2015-08-11 11:52 GMT+02:00 Will <alpha0...@yeah.net>: > Hello, > > I've managed to add an additional port to the cache memory but failed. > Does anybody knows how to add additional port to memory and assemble it in > the configuration script? > I would appreciate if some one can shed some light on this. > > Best regards, > Will > > > > <#14f1c2cbee9c6699_> > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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