Hi,
I have been trying to simulate an ARM platform on gem5 using ASIM benchmarks.My
command line is very simple and as follows: command line:
/home/A02047272/SmartCharge/gem5/build/ARM/gem5.opt
--stats-file=adobe.o3stats.txt
/home/A02047272/SmartCharge/gem5/configs/example/fs.py -b adobe -n 4
--cpu-type=detailed --caches --l2cache
--kernel=vmlinux.smp.ics.arm.asimbench.2.6.35
--disk-image=ARMv7a-ICS-Android.SMP.Asimbench-v3.img
--checkpoint-dir=/home/A02047272/SmartCharge/gem5/configs/boot/adobe
--maxinsts=999999999
And I am getting the following error message:
panic: Uncachable load [sn:3579b98] PC (0xc016b5c0=>0xc016b5c4).(0=>1) @ cycle
35895648[invoke:build/ARM/arch/generic/debugfaults.hh, line 94]Memory Usage:
35895648 KBytesProgram aborted at cycle 869721495000Aborted
The problem stems from the following snippet of code at
/home/A02047272/SmartCharge/gem5/src/cpu/o3/lsq_unit.hh if
(req->isUncacheable() && (load_idx != loadHead ||
!load_inst->isAtCommit())) { iewStage->rescheduleMemInst(load_inst);
++lsqRescheduledLoads; DPRINTF(LSQUnit, "Uncachable load [sn:%lli] PC
%s\n", load_inst->seqNum, load_inst->pcState());
// Must delete request now that it wasn't handed off to //
memory. This is quite ugly. @todo: Figure out the proper // place to
really handle request deletes. delete req; if
(TheISA::HasUnalignedMemAcc && sreqLow) { delete sreqLow;
delete sreqHigh; } return new GenericISA::M5PanicFault(
"Uncachable load [sn:%llx] PC %s\n", load_inst->seqNum,
load_inst->pcState()); }
Is there a fix for this?
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