Yeah, it sounds like this will line up nicely. I've been taking a break from o3 for a while, so any changes there will be new to me.
Thanks. On Fri, Apr 24, 2015 at 10:37 AM, Dutu, Alexandru <alexandru.d...@amd.com> wrote: > Hi Mitch, > > I have been focused on O3 cpu model running x86. Mainly, developing and > testing things in SE mode, however FS should benefit from the modifications > as well. Testing in FS will be something to be done in the near future. > > The main goal of my modifications is to get SMT in O3 to work with x86 in > SE mode for multiple programs and multi-threaded ones. This has been > accomplished, currently the patches are still going through review > internally. Some of these modification will benefit ARM ISA when running O3 > as well. We are diligently working on getting other required patches (the > ones that implement futex and clone) out before pushing the SMT ones. > > It seems to me our work complements each other. > > Best regards, > Alex > ------------------------------ > *From:* gem5-users [gem5-users-boun...@gem5.org] on behalf of Mitch > Hayenga [mitch.hayenga+g...@gmail.com] > *Sent:* Friday, April 24, 2015 9:55 AM > *To:* gem5 users mailing list > *Subject:* Re: [gem5-users] using SMT in gem5 > > Hi Alexander, > > Just saw this thread and thought I'd contribute. Are you focusing > additional SMT support on the various CPU models or just x86-ISA/library > side of things? I'm wondering how much overlap we have. > > I've recently been working on extending gem5 SMT support by adding SMT > to the Atomic, Timing, and MinorCPU models. Atomic/Timing CPU SMT was > simply done to enable fast-fowarding and restoring with a detailed > (MinorCPU-based) multi-threaded model. These patches will eventually > become public, but need more refinement at the moment. > > I've been focusing on getting SE mode up and running, but am about to > move onto adding FS support. The hope is that FS will be working sometime > in the June timeframe for ARM under gem5. > > Is there much overlap here with what's currently being done on your end > of things? I'm mostly focused on SE (currently just testing > multiprogrammed) and FS support of the core models. > > > On Thu, Apr 16, 2015 at 10:12 PM, Dutu, Alexandru <alexandru.d...@amd.com> > wrote: > >> Hi Sreejith, >> >> We are planning on submitting some patches which fix SMT issues with X86. >> This will happen over the next couple of weeks. In terms of getting an >> openmp program to run in SE mode, there are some syscalls which need to be >> implemented (i.e. sched_getaffinity). >> >> Best regards, >> Alex >> ------------------------------ >> *From:* gem5-users [gem5-users-boun...@gem5.org] on behalf of Sreejith K >> M [sreeju.manikan...@gmail.com] >> *Sent:* Friday, April 03, 2015 1:33 AM >> *To:* gem5-users@gem5.org >> *Subject:* [gem5-users] using SMT in gem5 >> >> Hi all, >> >> Iam trying to run some simple openmp program in gem5 using SMT. When I >> ran it in SE mode, I got errors that many functions are >> unimplemented(set_tid_address etc). Now Iam trying to run it in FS mode in >> ARM linux ael image. But there also, Iam getting errors as follows, >> >> *gem5.opt: build/ARM/cpu/o3/fetch_impl.hh:702: void >> DefaultFetch<Impl>::finishTranslation(const Fault&, RequestPtr) [with Impl >> = O3CPUImpl, Fault = RefCountingPtr<FaultBase>, RequestPtr = Request*]: >> Assertion `!finishTranslationEvent.scheduled()' failed.* >> * Program aborted at tick 2315524304500* >> *Aborted (core dumped)* >> >> >> Iam able to run the program in multiple CPUs but when I use >> multithreading in a single CPU, Iam getting errors. >> >> I want to know whether SMT is implemented in SE/FS mode . Do I need to >> make any changes while doing SMT? >> >> thanks and regards, >> >> Sreejith K M >> >> _______________________________________________ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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