The error you're seeing in your second email is precisely because you're no
longer using drain(). Basically you're in trouble if you switch CPUs while
there's a cache miss outstanding, because then the cache miss response will
come back to the wrong (old) CPU. The point of drain() is to put the
system in a stable state where you don't have outstanding activity.
Calling drain() actually initiates an iterative process that takes multiple
cycles to complete, so you can't initiate and complete a drain within a
single instruction. Look at the python drain() method in simulate.py.
Somehow you have to stall in the instruction and get back to the event loop
to complete the drain process.
Steve
On Sat, Sep 20, 2014 at 7:38 AM, sanem.arslan via gem5-users <
gem5-users@gem5.org> wrote:
> Hello again,
>
> I give up to use drain() and switchOut() functions since I only seek for
> migrate anapplication thread from one core to another without any change on
> cpu type. So I updated my pseudo-instruction like that:
>
> void
> my_func(ThreadContext *tc)
> {
> BaseCPU *oldcpu = tc->getCpuPtr();
> System *sys = tc->getSystemPtr();
> ThreadContext *other_tc = sys->threadContexts[0]; //migrate from calling
> cpu to cpu0.
> BaseCPU *newcpu = other_tc->getCpuPtr();
>
> tc->suspend();
> other_tc->takeOverFrom(tc);
> CpuEvent::replaceThreadContext(tc, other_tc);
> assert(other_tc->contextId() == tc->contextId());
> assert(other_tc->threadId() == tc->threadId());
> sys->replaceThreadContext(other_tc, other_tc->contextId());
>
> other_tc->pcState(other_tc->nextInstAddr());
>
> }
>
> However I get the following error now:
>
> Error:
> TimingSimpleCPU::activateContext _status 9 Idle 0 cpu id 0
> gem5.opt: build/ALPHA/cpu/simple/timing.cc:213: virtual void
> TimingSimpleCPU::activateContext(ThreadID, Cycles): Assertion `_status ==
> Idle' failed.
> Program aborted at cycle 2421875000000
> Aborted (core dumped)
>
> This error is about the receiver cpu (cpu0) cannot activate its migrated
> thread (other_tc) because of its status (status 9: DcacheWaitResponse) ?
>
> I cannot solve my problem. Is there really anyone who can help me about
> that?
>
> Bests,
> Sanem.
>
>
> 2014-09-18 14:48, sanem.arslan yazmış:
>
>> Hello,
>>
>> I am working on migrating application threads from one core to
>> another on gem5. I have implemented a pseudo-instruction to trigger
>> thread migration. When an application thread calls this
>> pseudo-instruction, I want to migrate the thread to another cpu. My
>> problem is that I cannot migrate application threads from simulator
>> side by using _pthread_ library. So I need to migrate all thread
>> context in simulator side.
>>
>> According to this [1] presentation on gem5 web site, I should use _
>> drain, switchOut, takeOverFrom_ and _resume_ functions of gem5.
>> However I do not know how to use them inside the pseudo-instruction.
>> If you have studied on this issue before, could you please inform me
>> about how to migrate threads step by step from simuator side?
>>
>> I put the codes inside my pseudo-instruction. Without using
>> _drainResume_() function, the system hangs. With using drainResume()
>> function, it gives cpu status error.
>>
>> void
>> my_func(ThreadContext *tc)
>> {
>>
>> BaseCPU *oldcpu = tc->getCpuPtr();
>> System *sys = tc->getSystemPtr();
>> ThreadContext *other_tc = sys->threadContexts[0]; //migrate from
>> calling cpu to cpu0.
>> BaseCPU *newcpu = other_tc->getCpuPtr();
>> oldcpu->drain(NULL);
>> oldcpu->switchOut();
>>
>> tc->suspend();
>> other_tc->takeOverFrom(tc);
>>
>> //timing cpu does not have resume function, instead it has
>> drainResume() function. //newcpu->drainResume();
>> }
>>
>> Thank you in advance for your time and help.
>>
>> Best Regards,
>> Sanem
>>
>>
>>
>> Links:
>> ------
>> [1] http://www.m5sim.org/wiki/images/d/da/Gutierrez_gem5_
>> workshop_2012.pdf
>>
> _______________________________________________
> gem5-users mailing list
> gem5-users@gem5.org
> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
_______________________________________________
gem5-users mailing list
gem5-users@gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
