Hi Andreas, Thanks for you reply. I am trying to understand src/cpu/minor. If I have a question, I will write back to the forum.
Thanks > Hi Naveed, > > The InOrder CPU is deprecated. Have a look at Minor in src/cpu/minor. > > Andreas > > On 07/10/2014 17:23, "Naveed Ul Mustafa via gem5-users" > <gem5-users@gem5.org> wrote: > >> >>Hi All, >> >>I need to model Cortex A7 architecture using gem5. It is a 8 >>stage-pipeline architecture with in-order execution. >> >>Is there anyone who has worked on this or can anyone guide me where to >>start. I know there is InOrderCPU.py in src/cpu/inorder. In documentation >>it states that by default it is 5-stage processor. How can I write the >>script to model a 8-stage ARM 7 processor? >> >>Thanks in advance for your help >> >>Naveed Ul Mustafa >> >>_______________________________________________ >>gem5-users mailing list >>gem5-users@gem5.org >>http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2548782 > > Naveed Ul Mustafa _______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
