Use srcMasterId to identify the original requester. Thanks, Amin
On Sat, Jul 26, 2014 at 1:23 AM, Debiprasanna Sahoo via gem5-users < gem5-users@gem5.org> wrote: > Hi, > > I need to manipulate requests received at cache and dram_ctrl on the basis > of their original CPU/Thread source. I tried to get the cpuId from masterId > by writing a function in system class , but found (or atleast suspect) that > for writeback requests, the original owner (masterId) of the request is > lost. I tried with contextId but found that sometimes the contextId is not > set. > > Moreover, when I try to get the masterId of the request in dram_ctrl, > sometimes I find that the request is NULL throwing a segfault. > > I find that their is a field name _cpuId in BaseCPU class, but > unfortunately it is not forwarded in any request object. > > Is there any other means of knowing which CPU or Thread made the request > to the cache and dram controller? > > Thanks, > Debiprasanna Sahoo > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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