Hi All, Doing some digging on performance issues in the O3 model we and others have run into allocation of the writeback buffer having a big performance impact. Basically, the a writeback buffer is grabbed at issue time and held through till completion. With default assumptions about the number of available writeback buffers, (x*issue width, where x is 1 by default), the buffers often end up bottlenecking the effective issue width (particularly in the face of long latency loads grabbing up all the WB buffers). What are these structures trying to model? I can see limiting the number of instructions allowed to complete and writeback/bypass in a cycle but this ends up being much more conservative than that if it is the intent. If not why does it do this? We can easily make number of WB bufs high but want to understand what is going on here first... Thanks! Paul
-- ----------------------------------------- Paul V. Gratz Assistant Professor ECE Dept, Texas A&M University Office: 333M WERC Phone: 979-488-4551 http://cesg.tamu.edu/faculty/paul-gratz/
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