Perhaps there is some bad data in the srcMasterId? The master Ids are
allocated at the beginning of simulation and the error you're seeing is
that a master ID was either allocated after this or is junk. Each master
id uniquely identifies every device in the system that can generate a
packet.
Ali
On 05.05.2014 21:02, 陈越佳 via gem5-users wrote:
> Hi. I have solve the problem above. But I have another problem. I want to
> change the lrc.cc. If the A pkt is a read operation, the block in the cache
> shouldn't be replaced. And if the B pkt is a write operation, the block in
> teh cache should be replaced. I modified the insertBolock in lrc.ccas follow:
> if(pkt->isWrite()){
>
> ***code not changed****
>
> }
>
> means if the pkt is write, execute the insertBlock. But when I run the
> benchmark,there is another error"gem5.opt:
> build/ALPHA/mem/cache/tags/wf.cc:195: void WF::invalidate(WF::BlkType*):
> Assertion `blk->srcMasterId < cache->system->maxMasters()' failed."
> Anyone can help me?
> Thanks
> Yuejia
>
> _______________________________________________
> gem5-users mailing list
> [email protected]
> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [1]
Links:
------
[1] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
