Hi,
It seems that the latency unit has been changed from Tick (ns) to Cycle. Is
that correct? For example I see
class L1Cache(BaseCache):
size= '32kB'
assoc = 4
hit_latency = 2
response_latency = 2
is_top_level = True
Using CACTI, at 45nm process technology and 2.5GHz cpu frequency, the L1
access latency is 1 cycle. So should I set
hit_latency = 1
response_latency = 1
?
Regards,
Mahmood
_______________________________________________
gem5-users mailing list
gem5-users@gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
