Hello, I'm using GEM5 to collect DRAM memory access traces. I'm running an out-of-order model of ARM with the classic memory (enabled L1 and L2 caches), and using DPRINTF statements inside the DRAM model.
The output I'm getting is something like this: 1775299000: system.physmem: Memory request of 32 bytes for address: WRITE 96400 1775436000: system.physmem: Memory request of 32 bytes for address: READ 903e0 1775492000: system.physmem: Memory request of 32 bytes for address: READ 923e0 1775523000: system.physmem: Memory request of 32 bytes for address: WRITE 8e3e0 1775598000: system.physmem: Memory request of 32 bytes for address: READ 96400 1776024000: system.physmem: Memory request of 32 bytes for address: READ 983e0 1776055000: system.physmem: Memory request of 32 bytes for address: WRITE 903e0 1776131000: system.physmem: Memory request of 32 bytes for address: READ 903e0 1776162000: system.physmem: Memory request of 32 bytes for address: WRITE 943e0 1776197500: system.physmem: Memory request of 32 bytes for address: READ 92400^C My question is what does the numbers on the left mean. Are those simulation cycles (and if so, is that measured according to the system clock or the processor clock)? Or are they actually time (perhaps measured in nanoseconds)? Thanks in advance.
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