Hello, I recommend changing them according to ARM manuals (I took the latencies with fastforward/bypassing). Another thing to check: in the stable version of june/2012, the SimdFloat* operation classes regroup both VFP and NEON instructions (Float* op classes aren't used!), whose latencies may be different. If someone fixed that I'd like to know!
Regards, -- Fernando A. Endo, PhD student and researcher Université de Grenoble, UJF France 2013/10/21 Amin Farmahini <[email protected]> > Hi All, > > The operation latency of some SIMD instructions given in > configs/common/O3_ARM_v7a.py does not seem right to me. For example, the > operation latency of SimdFloatMultAcc is only 1 cycle and operation latency > of SimdFloatDiv is only 3 cycles. These latency values seem too low. Any > thoughts? > > Thanks, > Amin > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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