If we want the miss penalties to be same for every read miss and write miss, what changes should be made?
On Fri, Jul 5, 2013 at 8:44 PM, biswabandan panda <biswa....@gmail.com>wrote: > Yup. It depends on the DRAM configuration and things like BLP, RBL. In > case of simple DRAM also, things like MLP changes the penalty. > > > On Fri, Jul 5, 2013 at 8:40 PM, Bhawna Jain <bhawna18...@gmail.com> wrote: > >> Does cache latency differs for different cache reads and writes due to >> write buffers and mshr, especially write misses. >> >> Bhawna Jain >> >> >> On Fri, Jul 5, 2013 at 1:09 PM, Andreas Hansson >> <andreas.hans...@arm.com>wrote: >> >>> If you want to see more of the temporal communication behaviour, you >>> can place a CommMonitor between e.g. the L2 and membus. With a >>> fine-granularity sampling interval for the monitor itself (and potentially >>> a global stat dump on a fine granularity as well) you can get a lot of >>> insight in the spatial and temporal communication behaviour (bandwidth, >>> latency, inter-transaction-time, address distribution etc). >>> >>> Andreas >>> >>> From: biswabandan panda <biswa....@gmail.com> >>> Reply-To: gem5 users mailing list <gem5-users@gem5.org> >>> Date: Friday, 5 July 2013 08:02 >>> To: gem5 users mailing list <gem5-users@gem5.org> >>> Subject: Re: [gem5-users] Obtain cache miss penalty cycles >>> >>> Correction - You should check recvTimingResp(PacketPtr pkt) and not >>> handleResponse. In earlier versions of gem5 handleResponse used to be there >>> instead of recvTimingResp. >>> >>> >>> On Thu, Jul 4, 2013 at 5:24 PM, biswabandan panda >>> <biswa....@gmail.com>wrote: >>> >>>> You should look at handleResponse function in cache_impl.hh. Based on >>>> the type of the request type (read or write), you could get the penalty. >>>> >>>> >>>> On Thu, Jul 4, 2013 at 3:48 PM, Bhawna Jain <bhawna18...@gmail.com>wrote: >>>> >>>>> How can we obtain cache miss read and write penalties in gem5? Not >>>>> average but exact miss penalty for a single read and single write. >>>>> >>>>> _______________________________________________ >>>>> gem5-users mailing list >>>>> gem5-users@gem5.org >>>>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>>>> >>>> >>>> >>>> >>>> -- >>>> >>>> *thanks®ards >>>> * >>>> *BISWABANDAN* >>>> http://www.cse.iitm.ac.in/~biswa/ >>>> >>>> “We might fall down, but we will never lay down. We might not be the >>>> best, but we will beat the best! We might not be at the top, but we will >>>> rise.” >>>> >>>> >>>> >>> >>> >>> -- >>> >>> *thanks®ards >>> * >>> *BISWABANDAN* >>> http://www.cse.iitm.ac.in/~biswa/ >>> >>> “We might fall down, but we will never lay down. We might not be the >>> best, but we will beat the best! We might not be at the top, but we will >>> rise.” >>> >>> >>> >>> -- IMPORTANT NOTICE: The contents of this email and any attachments are >>> confidential and may also be privileged. If you are not the intended >>> recipient, please notify the sender immediately and do not disclose the >>> contents to any other person, use it for any purpose, or store or copy the >>> information in any medium. Thank you. >>> >>> _______________________________________________ >>> gem5-users mailing list >>> gem5-users@gem5.org >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >> >> >> _______________________________________________ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > > -- > > *thanks®ards > * > *BISWABANDAN* > http://www.cse.iitm.ac.in/~biswa/ > > “We might fall down, but we will never lay down. We might not be the best, > but we will beat the best! We might not be at the top, but we will rise.” > > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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