I think I pasted the wrong output, it should have been for L1 caches since
I use MESI, and here is that.

Cache Stats: system.ruby.l1_cntrl0.L1IcacheMemory
  system.ruby.l1_cntrl0.L1IcacheMemory_total_accesses: 113665321
  system.ruby.l1_cntrl0.L1IcacheMemory_total_demand_accesses: 113665321
  system.ruby.l1_cntrl0.L1IcacheMemory_total_hits: 112968155
  system.ruby.l1_cntrl0.L1IcacheMemory_total_demand_hits: 112968155
  system.ruby.l1_cntrl0.L1IcacheMemory_total_misses: 697166
  system.ruby.l1_cntrl0.L1IcacheMemory_total_demand_misses: 697166
  system.ruby.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
  system.ruby.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
  system.ruby.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
  system.ruby.l1_cntrl0.L1IcacheMemory_miss_rate: 0.61335%
  system.ruby.l1_cntrl0.L1IcacheMemory_demand_miss_rate: 0.61335%

2013/2/27 mehmet basaran <[email protected]>

> Hi Malek,
>
> I did just that and it works. Here is my output;
>
> Cache Stats: system.ruby.l2_cntrl0.L2cacheMemory
>   system.ruby.l2_cntrl0.L2cacheMemory_total_accesses: 189860
>   system.ruby.l2_cntrl0.L2cacheMemory_total_demand_accesses: 189860
>   system.ruby.l2_cntrl0.L2cacheMemory_total_hits: 0
>   system.ruby.l2_cntrl0.L2cacheMemory_total_demand_hits: 0
>   system.ruby.l2_cntrl0.L2cacheMemory_total_misses: 189860
>   system.ruby.l2_cntrl0.L2cacheMemory_total_demand_misses: 189860
>   system.ruby.l2_cntrl0.L2cacheMemory_total_prefetches: 0
>   system.ruby.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0
>   system.ruby.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0
>   system.ruby.l2_cntrl0.L2cacheMemory_miss_rate: 100%
>   system.ruby.l2_cntrl0.L2cacheMemory_demand_miss_rate: 100%
>
>   system.ruby.l2_cntrl0.L2cacheMemory_request_type_GETS:   24.4054%
>   system.ruby.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR:   8.69535%
>   system.ruby.l2_cntrl0.L2cacheMemory_request_type_GETX:   66.8993%
>
>   system.ruby.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor:
> 189860    100%
>
>
> Thanks a lot.
> Mehmet
>
>
> 2013/2/27 mehmet basaran <[email protected]>
>
>> Hi Malek,
>>
>> Thanks for the lightning fast response. So using my command line as it
>> is, I cannot test with ruby.
>>
>> First way (Incorrect - Not working)
>> --------------------------------------------------------------------
>>
>> I tried to change protocol from build/variables/X86 file
>>
>> from => PROTOCOL = 'MI_example'
>> to => PROTOCOL = 'MESI_CMP_directory'
>>
>> and it didn't work out
>>
>>
>> Second way (correct ... I suppose)
>> --------------------------------------------------------------------
>> and I checked out the command you specified in the review-board
>>
>> ./util/regress --builds=ALPHA_MESI_CMP_directory,ALPHA_MOESI_CMP_directory 
>> --modes=se,fs --compile-variants=opt
>>
>>
>> this basically does the same thing right? Instead of tweaking with one
>> build, you create 2 seperate builds and each have its own variable file
>> configured accordingly. And these configurations are also predefined under
>> build_opts. I think I can specify add extra files under built_opts and
>> create different builds.
>>
>> *build_opts/X86_MESI_CMP_directory*
>>
>> TARGET_ISA = 'x86'
>> CPU_MODELS = 'TimingSimpleCPU,O3CPU'
>> PROTOCOL = 'MESI_CMP_directory'
>>
>> *build_opts/X86_MOESI_CMP_directory*
>>
>> TARGET_ISA = 'x86'
>> CPU_MODELS = 'TimingSimpleCPU,O3CPU'
>> PROTOCOL = 'MOESI_CMP_directory'
>>
>> Then use your command;
>>
>> ./util/regress --builds=X86_MESI_CMP_directory,X86_MOESI_CMP_directory 
>> --modes=se,fs --compile-variants=opt
>>
>>
>> and finally;
>>
>> build/X86_MESI_CMP_directory/gem5.opt configs/example/ruby_fs.py 
>> --kernel="x86_64-vmlinux-2.6.22.9" --script="boot/queens.rcS" --caches 
>> --l2cache
>>
>>
>> ---------------------------------------------------------------------------
>>
>> In conclusion, gem5 needs to build from scratch to enable these cache
>> coherence protocols. Simply changing build/variables/X86 like the first
>> method will not do any difference, since this file is just a mere copy
>> after first compilation. And if I compile second time using the same
>> command, gem5 will check this folder and use build/variables/X86 (not sure
>> about it tough).
>>
>> I think this is it, right? I will also come back to confirm if it works.
>>
>> Sources;
>> http://www.mail-archive.com/[email protected]/msg02950.html
>> http://www.mail-archive.com/[email protected]/msg00352.html
>>
>>
>> 2013/2/27 Malek Musleh <[email protected]>
>>
>>> Hi mehmet,
>>>
>>> You shouldn't need to do anything to do anything additional from the
>>> command line, although looking at your command line, there is a
>>> mistake:
>>>
>>> You are running the classic memory model (the patch is for the ruby
>>> memory model). You need to run ./builld/X86_MOESI_CMP_directory, or
>>> ./build/X86_MESI_CMP_directory. If you look at the telnet output
>>> (m5term 3456) I'm betting that the simulation did not actually run
>>> (since your mixing ruby_fs.py with classic memory model).
>>>
>>> Look at the timestamp of the stats file also.
>>>
>>> Malek
>>>
>>> On Tue, Feb 26, 2013 at 5:25 PM, mehmet basaran
>>> <[email protected]> wrote:
>>> > Hi Malek
>>> >
>>> > It does apply cleanly on dev repo. However, I don't know how to get it
>>> work.
>>> > Can you write an example command for MESI protocol? And how do we
>>> decide on
>>> > using particular protocol in the first place? Do I have to state it
>>> > explicitly in command, or it is decided in some code file? The command
>>> line
>>> > I used is;
>>> >
>>> > build/X86/gem5.opt configs/example/ruby_fs.py
>>> > --kernel="x86_64-vmlinux-2.6.22.9" --script="boot/queens.rcS" --caches
>>> > --l2cache
>>> >
>>> > this gives the same output in ruby.stats when I hadn't applied your
>>> patch.
>>> > How should I change it?
>>> >
>>> > By the way, I checked out the changes you made in the code and it
>>> really
>>> > helped me get more into it. So thanks a lot.
>>> >
>>> > Mehmet
>>> >
>>> >
>>> > 2013/2/15 Malek Musleh <[email protected]>
>>> >>
>>> >> Hi mehmet,
>>> >>
>>> >> I have posted a patch on the review board that does this:
>>> >>
>>> >> http://reviews.gem5.org/r/1467/diff/
>>> >>
>>> >> If I recall, I only apply it to the MOESI_CMP, MESI protocols. You can
>>> >> take a look, or apply the diff (not sure if it will apply cleanly on
>>> >> the dev repo).
>>> >>
>>> >> Malek
>>> >>
>>> >> On Fri, Feb 15, 2013 at 9:26 AM, mehmet basaran
>>> >> <[email protected]> wrote:
>>> >> > Hi all,
>>> >> >
>>> >> > I am trying to get the cache miss & hit ratio counts. I started in
>>> se
>>> >> > mode,
>>> >> > and observed that by using normal caches in config files, I always
>>> get
>>> >> > miss_rate="1"
>>> >> >
>>> >> > So I decided to use ruby_fs mode instead. But ruby.stats file
>>> doesn't
>>> >> > give
>>> >> > me a miss ratio or hit count.  It seems to me that I cannot get
>>> miss &
>>> >> > hit
>>> >> > counts correct whether I use ruby or not. Is this the case? Does
>>> gem5
>>> >> > has
>>> >> > built in mechanism for getting cache miss&hit rates? (without
>>> modifying
>>> >> > the
>>> >> > code)
>>> >> >
>>> >> > In addition I have couple of concepts I need to know in ruby.stats
>>> file;
>>> >> > 1. All Non-Zero Cycle Demand Cache Accesses
>>> >> > 2. ruby_cycles_executed: [ 10904501813 ]
>>> >> > 3. "miss_latency_Locked_RMW_Write_L1Cache: [binsize: 1 max: 3 count:
>>> >> > 1374
>>> >> > average:     3 | standard deviation: 0 | 0 0 0 1374 ]"
>>> >> > what is binsize here ?
>>> >> >
>>> >> > Do we have any documentation about the content of ruby.stats file?
>>> >> >
>>> >> > My commands;
>>> >> >
>>> >> > For se:
>>> >> > ./build/X86/gem5.opt --debug-flags=Cache --trace-file=my_trace.out
>>> >> > configs/example/se.py --caches --l2cache --cpu-type=timing -c
>>> >> > tests/test-progs/queens/bin/x86/linux/queens --options="-c 8"
>>> >> >
>>> >> > For fs:
>>> >> > ./build/X86/gem5.fast configs/example/ruby_fs.py --num-cpus="8"
>>> >> > --kernel="x86_64-vmlinux-2.6.22.9" --l1i_size="32kB"
>>> --l1d_size="32kB"
>>> >> > --l2_size="8MB" --num-l2caches="8" --topology="Crossbar"
>>> >> > --cpu-type="timing"
>>> >> > --script="boot/my_script.rcS"
>>> >> >
>>> >> > Thanks in advance.
>>> >> >
>>> >> > _______________________________________________
>>> >> > gem5-users mailing list
>>> >> > [email protected]
>>> >> > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>>> >> _______________________________________________
>>> >> gem5-users mailing list
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>>> >
>>> >
>>> >
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>>
>
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