When the memory mode is set to atomic, the prefetcher is NOT activated. As Ali mentioned, you can easily modify the cache_impl.hh to call prefetcher. You need to modify atomicAccess(). Take a look at timingAccess() and see how prefetcher is notified in that function.
Thanks, Amin On Wed, Feb 13, 2013 at 11:55 AM, Ali Saidi <sa...@umich.edu> wrote: > ** > > You can use caches with the Atomic memory mode (and CPU). Generally people > don't because the requests still aren't split transaction, but they will > run in the system. As far as the prefetcher goes, I'm not certain the > prefetcher is activated when the memory mode is set to atomic. You could > look at the code in cache_impl.hh and see where the prefetcher is called > and if you can get to that function in atomic mode or only in timing mode. > > Ali > > > > On 13.02.2013 10:13, Arthur Perais wrote: > > To my knowledge, you cannot use caches with the AtomicCPU, hence, you > cannot use the Prefetcher. > > Le 13/02/2013 15:13, Mr. Orangeade a écrit : > > I've added StridePrefetcher to the L2Cache object but don't see any effect > of prefetching. > It looks like it simply doesn't work. > At the same time it works fine with the 'arm_detailed' model and I wonder > if it possible to use it with any faster model? > > Thanks! > > > _______________________________________________ > gem5-users mailing > listgem5-users@gem5.orghttp://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > _______________________________________________ > gem5-users mailing > listgem5-users@gem5.orghttp://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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