Sorry about that; I hope that people finding that thread later on read the followup post where I stand corrected.
On Thu, Jan 3, 2013 at 1:51 PM, Ali Saidi <sa...@umich.edu> wrote: > ** > > Hi Dave, > > > > There isn't a limit on the number of pending page walks. At least for ARM > only a single walk can be active at a time. Because the walk does take > time, back pressure is applied to the CPU, but the CPU can request as many > as it would like. Since this original posting, a bug was fixed in which > instructions that were squashed with a pending walk would still have that > walk occur. This has been fixed and the number of pending walks is rather > small and the original bug has been addressed. > > > > Thanks, > > Ali > > > > On 03.01.2013 13:19, David Roberts wrote: > > Hello, > > Paul referred to gem5 not being able to put backpressure on the CPU from > the main memory, citing this topic; > > > http://www.mail-archive.com/gem5-users@gem5.org/msg03792.html > > According to this post there is no limit to the number of concurrent > page walks. Do page walks go through the main memory system and could > reach DRAM by the normal mechanisms? Is it a true statement about lack of > backpressure? It seems hard to believe because response latency is being > modeled. > > Thanks > > Dave > > > On Oct 23, 2012, at 12:49 PM, Paul Rosenfeld wrote: > > As someone who has used (and tried to modify) both marssx86 and gem5, I > would like to add one (potential) benefit to the marssx86 side of things: > the emulation mode (via QEMU) allows you to boot the system very quickly up > to a region of interest and take a checkpoint right before the simulation > launch point. From what I understand, the full system boot process is much > slower in gem5 even if booting with a simple CPU model and then picking up > with the O3 model. > > Additionally, since you mentioned DRAMSim2, it might be worthwhile to note > that even with DRAMSim2, gem5 does not (currently) support putting > backpressure on the CPU (see: > http://www.mail-archive.com/gem5-users@gem5.org/msg03792.html), which, > depending on what you're trying to do, this may or may not be an important > consideration. > > Finally, one last thing to add to your list, marss doesn't support any > kind of syscall emulation mode (i.e. you have to run full system mode all > the time) whereas gem5 does. > > -Paul > > On Mon, Oct 22, 2012 at 5:06 PM, Payne, Benjamin <bpa...@lps.umd.edu>wrote: > >> Hello, >> >> >> >> What is the difference between gem5 >> >> http://gem5.org/Main_Page >> >> and MARSS (Micro-ARchitectural and System Simulator for x86-based Systems) >> >> http://marss86.org/~marss86/index.php/Home >> >> >> >> As far as I can tell, >> >> -gem5 can support Alpha, ARM, SPARC, and x86 instruction set >> architectures, whereas MARSS is only for x86. >> >> -gem5 can be integrated into Structural Simulation Toolkit, whereas MARSS >> has not been >> >> -both gem5 and MARSS can simulate multiple cores >> >> -both gem5 and MARSS can use DRAMSim2 >> >> >> >> Please correct me if any of these statements are incorrect. >> >> >> >> Are there any other considerations? >> >> >> >> Thank you, >> >> >> >> >> >> Ben Payne >> >> http://mst.edu/~bhpxc9/ >> >> Suite 450, Room S452 >> >> 5520 Research Park Drive >> >> Catonsville, MD 21228-4870 >> >> Laboratory for Physical Sciences >> >> http://www.lps.umd.edu/ >> >> office: 443-654-7890 >> >> cell: 608-308-2413 >> >> >> >> _______________________________________________ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > _______________________________________________ > gem5-users mailing > listgem5-users@gem5.orghttp://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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