Hi,
Because the simple atomic CPU gets a response to memory accesses immediately it doesn't need a split transaction (init, complete). The other CPU models consider the timing of the memory system and therefore have to use split transactions. Thanks, Ali On 10.11.2012 21:10, Tri M. Nguyen wrote: > Quick question, what are the initAccess, execute, and competeAccess for in ARM? What is the correct order? And why is "readMemTiming" mapped to init, "readMemAtomic" to execute, and getMem(pkt) to complete? I am a bit confused because "readMemAtomic" calls "readMemTiming"in memhelpers.hh. > > Tri > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [1] Links: ------ [1] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
_______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users