Hi guys, I wish to do a study on IFT (information flow tracking) with gem5. This entails making a shadow memory, shadow cache, and security bits propagation in the CPU pipeline. For now I just want to append the security bits onto the ISA registers, as well as machine registers. Does anyone has any suggestion on where to begin?
Cheers, Tri
_______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
