One more question will be is the nextPC associated with the DynInst the physically next instruction stored after the current one, or it is just predicted by some units??
On Thu, Oct 25, 2012 at 8:14 PM, Shen Yiran <yira...@gmail.com> wrote: > Hi All, > > I am looking into the fetching stage for X86 O3. I have one question. For > ordinary PC advancing without prediction or branch, lets say the current PC > is: > 0x4120a4.0 while the nextPC associated with the same DynInst is 4120a5.1 > Why the actual PC fetched next will be 0x4120a4.1 instead of 4120a5.1?? It > seems there is no prediction or branch involved here. > Another example will be like the current DynInst is 0x4120a4.2=>0x4120a5.3 > But the actually fetched one will be 0x4120a5.0 > > How is X86's macro-op and micro-op correlated? > > Thanks a lot. > > Cheers, > -Jacob > > >
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