Ali Saidi <saidi <at> umich.edu> writes:

> 
> 
> Hi Manu,
>  
> I don't know why you're seeing that issue,but you'd need to provide a back 
trace to see which event is being scheduled that was already scheduled. FYI, 
people normally boot with a simple CPU, take a checkpoint, and then restore 
from 
that checkpoint. THis lest you get to the region of interest in the benchmark 
much more quickly than booting the machine with e detailed cpu.
>  
> Ali


Hi Ali,
Thanks for the quick reply. Is there a commandline argument that I can use to 
capture the list of events being scheduled - or just a regular gdb backtrace?

Thanks,
Manu




>  
> On 05.10.2012 10:16, Manu Awasthi wrote:
> 
> Hi,
> I am running some java benchmarks (DaCaPo, SPEC JVM, SPEC JBB and NPB) with 
the ARM ISA and am receiving assertion failures 
>  
> my commandline  ./build/ARM/m5.opt configs/example/fs.py --kernel=vmlinux-3.3-
arm-vexpress-emm-pcie --machine-type=VExpress_EMM --disk-image=arm-ubuntu-natty-
headless-java.img --script=specjvm2008.rcS --cpu-type=detailed --caches --
l1d_size=32kB --l1d_assoc=2 --l1i_size=32kB --l1i_assoc=2 --l2cache --
l2_size=4MB --l2_assoc=8 --clock=2.5GHz --maxinsts=2000000000
>  
> Assertion Failure :: m5.opt: build/ARM/sim/eventq.hh:485: void 
EventQueue::schedule(Event*, Tick): Assertion `!event->scheduled()' failed.
> Program aborted at cycle 2093739635000
>  
> I get the same assertion failures if I use  --cpu-type=arm_detailed as well.
>  
>  
> Has anyone else run into a similar problem as well? Any help would be 
appreciated.
>  
>  
> Thanks,
> Manu
>  
>  
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>  
>  
> 
> 
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