Hi Tushar, I have tried to modify the PerfectSwitch to schedule messages according to a fixed round robin order. And then I also did the same to the throttle link by changing the wakeup order. However, I still cannot see the total order in multiple logic buses. I wonder if that is because the implementation of PerfectSwtich does not reflect the timing characteristic of a real router. It just simply copies everything from the inport to the outport. Although I scheduled according to a predefined order, but actually it's still done right away. Maybe a more detailed model such as Garnet router can solve the problem? I wonder if that's the issue or there is something else I am missing here.
What I did is just to take a few logic buses (I have tested a individual bus with a broadcast protocol and it works). Each node has a router before all the input links from the buses to model multiple reading channels for the node. Each node only has one output link connecting to its dedicated writing bus to model the single writing channel. In this way, it models single write multi read bus-based crossbar....I am not sure if this is the right way to model it and if this kind of design should provide total order. Any comments? Thank you very much! Best, Jinzhu On Fri, Aug 10, 2012 at 9:58 PM, gem5 gem5 <gem5.user....@gmail.com> wrote: > Tushar, > > Thank you very much. Yes, I guess all the routers are connected to the > same MessageBuffer and each router represents a logic bus. I think the > controller does not listen to all the buses according to a particular > order. Even if I connect a router before the controller, the router might > not listen to all the buses according to a particular order. I thought the > simple network's router arbitrates/allocates everything following the same > round robin, but maybe that's not the case... > > Thanks for your suggestion. I will look at the simple router first and > then check the event queue if necessary. > > Best, > > Jinzhu > > > On Fri, Aug 10, 2012 at 12:19 AM, Tushar Krishna <tus...@csail.mit.edu>wrote: > >> Hi Jinzhu, >> Hmm if I understand your topology correctly, each controller connects to >> multiple routers: each router corresponding to one bus. >> The problem is that all these routers connect to the same MessageBuffer >> in the controller... ? >> And I guess the problem occurs because the routers on each bus can wake >> up in any order within a cycle which means the controller's MessageBuffer >> does not see messages from each bus in a particular order. >> >> If this is the problem, connecting all buses/routers to *one* router >> which then connects to the controller, and then reading each bus in a >> particular order should solve the problem. But you say you tried that? You >> should probably debug why that doesn't work.. >> >> If your problem can be solved by a particular wakeup order, you could >> look into the event queue to see if you can create some order between >> events with the same time. I don't have any experience with that though... >> >> - Tushar >> >> >> On Aug 9, 2012, at 5:37 PM, gem5 gem5 <gem5.user....@gmail.com> wrote: >> >> > Hi, >> > >> > I have created a logic bus to run a broadcast protocol which requires >> total ordering in ruby simple network. It works. Now I need to have >> multiple logic buses. To achieve total ordering among different buses, each >> cache/directory controller needs to listen to all the buses according to a >> predefined order. I have tried several methods, such as, set the interface >> MessageBuffer order to be true, connect a router between all the input >> links and a controller, but none of them works. I wonder what 's the right >> way to achieve the goal. Thanks. >> > >> > Best, >> > >> > Jinzhu >> > _______________________________________________ >> > gem5-users mailing list >> > gem5-users@gem5.org >> > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> _______________________________________________ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > >
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