Hi, All,
I have some questions about multi core full system simulation:
1. Is there any way that I can specify the chip area in a CMP
configuration?
2.For ARM FS mode, If I do not use checkpoint, can I use the detail
CPU mode from the beginning to boot the system?
3.Any one has the successful experience of integrate McPAT or any
other power model with gem5? I try to use and modify m5-mcpat-parse.py
code( by Richard Strong), but the generated input XML for McPAT can not run
in power simulation. Any suggestion?
4.Is Ruby supported in ARM FS in the latest version of gem5? What is
the default coherence cache protocol for classic memory system?
Thanks in advance.
Regards,
Bojun Ma
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