Hi everyone,
I merely wanted to highlight that I just pushed a fair bunch of patches
relating to the bus model. The most notable changes are 1) the introduction of
a separate request and response layer, and 2) a reduction of the default bus
width from the rather excessive 64 bytes to 8 bytes.
As a result of these changes plenty of the stats have changed. Don't be
alarmed, you can still override the bus width if you want. Within the next few
weeks I'll also try and push a patch that ensures that the L1-to-L2 bus is
16bytes and running at the CPU clock speed.
Andreas
-- IMPORTANT NOTICE: The contents of this email and any attachments are
confidential and may also be privileged. If you are not the intended recipient,
please notify the sender immediately and do not disclose the contents to any
other person, use it for any purpose, or store or copy the information in any
medium. Thank you.
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users