On Mon, June 11, 2012 6:18 am, zhengchl wrote: > Hello everyone, > > I'm trying to understand the cache coherence protocol, and I'm > successfully in its 'cache' part like MI_example-cache.sm. But I'm > puzzled at its 'dir' part like MI_example-dir.sm. I have many question > about the source code of DirectoryMemory. > > 1. what is the mean of class static arguments *m_num_directories* and > *m_num_directories_bits*? It seems that there may be multiple instances > of DirectoryMemory.
Why is that a problem? It can always be the case that a particular directory is only tracking a portion of the address space, similar to a cache which might distributed across the chip. > 2. the function *mapAddressToDirectoryVersion* is more strange. I think > that the mapping between memory address and serial number of directory > entry should be *address%RubySystem::getBlockSizeBytes()*, but in fact > it's associated with argument *m_num_directories_bits*. Again, you don't explain why what you suggest should be the case. And I think what you are suggesting is subsumed in what has been implemented. > 3. when argument *m_use_map* is set to *ture*, class SparseMemory is > used instead of a simple array of directory entry, what is it? > In case of SparseMemory, the memory is maintained as set of blocks (64 bytes in size by default). Otherwise, the memory is maintained as set of pages (4KB in size by default). SparseMemory can result in less memory usage depending on how sparsely the address space is used. -- Nilay _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
