I haven't tested this at all (even to make sure it compiles) but give
this a shot. This is a quick attempt to actually fix the check.
Gabe
On 11/28/11 20:35, huangyongbing wrote:
> Hi,
>
> I just tested your patch on my PC (Intel Nehalem), but unfortunately
> it didn't work.
>
>
> Yongbing Huang
>
> //
> ------------------------------------------------------------------------
> *发件人：* Anders Handler
> *发送时间：* 2011-11-29 06:47:33
> *收件人：* gem5 users mailing list
> *抄送：*
> *主题：* Re: [gem5-users] Problem with Linux kernel 3.1
> Hi,
>
> The attached patch will make it work (just disables some checks). I
> will make the right checks and send it here on Wednesday.
>
> The problem was some faulty checks in
> src/arch/x86/isa/microops/regop.isa, where the descriptor-table
> register might fail. I'll find the appropriate checks in the AMD manual.
>
> Anders
>
>
> On Mon, Nov 28, 2011 at 10:38 PM, Gabe Black <[email protected]
> <mailto:[email protected]>> wrote:
>
> What CPU are you using? How did you determine this is where it
> gets stuck? Have you traced execution near there? Does it get
> stuck in the microcode looping forever, executing the same
> instruction over and over, etc., or does it stop executing
> instructions all together, perpetually trying to vector to an
> exception handler for instance?
>
> My off hand guess to what's going on is that the check that makes
> sure the selector is ok isn't handling a NULL selector properly.
> The AMD architecture manal says this:
>
> "Null selectors can only be loaded into the DS, ES, FS and GS
> data-segment registers, and into the LDTR descriptor-table
> register. A #GP occurs if software attempts to load the CS
> register with a null selector or if software attempts to load the
> SS register with a null selector in non 64-bit mode or at CPL 3."
>
> It sounds like you've determined that %eax should really be 0 when
> that instruction executes.
>
> With some more information I'll try to look at this sometime in
> the next week or two.
>
> Gabe
>
>
> On 11/28/11 05:16, Anders Handler wrote:
>> Hi,
>>
>> I have the same problem. The last instruction decoded in a kernel
>> >2.6.32 is
>>
>> 8e d0 mov %eax,%ss
>>
>> where %eax contains 0 (xor %eax,%eax).
>>
>> In 2.6.32 and earlier the segment registers was set to "movl
>> $__KERNEL_DS,%eax", which in my 2.6.32 kernel was 0x18.
>>
>> The code is found in head_64.S in entry point "secondary_startup_64".
>>
>> Any clue why the simulator gets stuck here?
>>
>>
>> Best regards
>> Anders
>>
>> 2011/11/28 huangyongbing <[email protected]
>> <mailto:[email protected]>>
>>
>> Hi all,
>>
>> I try to run Gem5 using X86_FS and Linux kernel 3.1. The
>> configuration file I use is downloaded from Gem5 website
>> which contained in file 'config-x86.tar.gz'. No errors are
>> printed out by gem5. However, there is also nothing printed
>> out in m5term console. Using the same configuration file,
>> Linux kernel 2.6.32 is runnable on Gem5. Thus, what's the
>> problem?
>>
>>
>> 2011-11-28
>>
>> ------------------------------------------------------------------------
>> -- Yongbing Huang
>>
>> _______________________________________________
>> gem5-users mailing list
>> [email protected] <mailto:[email protected]>
>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>>
>>
>>
>> _______________________________________________
>> gem5-users mailing list
>> [email protected] <mailto:[email protected]>
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>
>
> _______________________________________________
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>
>
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# HG changeset patch
# Parent e70d031cb5f91e2212a1a73ea1769bf0549b826c
X86: Fix a bad segmentation check for the stack segment.
diff -r e70d031cb5f9 -r 91ce1ed467b7 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Mon Nov 28 04:35:55 2011 -0500
+++ b/src/arch/x86/isa/microops/regop.isa Tue Nov 29 03:00:41 2011 -0500
@@ -1335,16 +1335,15 @@
if (selector.si || selector.ti) {
if (!desc.p) {
fault = new StackFault(selector);
- }
- } else {
- if ((m5reg.submode != SixtyFourBitMode ||
- m5reg.cpl == 3) ||
- !(desc.s == 1 &&
- desc.type.codeOrData == 0 && desc.type.w) ||
+ } else if (!(desc.s == 1 && desc.type.codeOrData == 0 &&
+ desc.type.w) ||
(desc.dpl != m5reg.cpl) ||
(selector.rpl != m5reg.cpl)) {
fault = new GeneralProtection(selector);
}
+ } else if (m5reg.submode != SixtyFourBitMode ||
+ m5reg.cpl == 3) {
+ fault = new GeneralProtection(selector);
}
break;
case SegIretCheck:
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