Richard Cooper has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/69684?usp=email )
Change subject: configs: Add Tarmac tracing option to the simple Arm configs
......................................................................
configs: Add Tarmac tracing option to the simple Arm configs
gem5 supports Tarmac trace generation for Arm simulations, but there
are no examples of how to use this feature.
This patch adds a `--tarmac-gen` option to three of the simple Arm
configs. Tarmac generation is useful for out-of-the-box users, and
this patch also provides an example of how to use the Tarmac
generation feature.
Change-Id: I0d3c523b5c0bb6d94de93bc502e4451622fb635d
---
M configs/example/arm/baremetal.py
M configs/example/arm/devices.py
M configs/example/arm/starter_fs.py
M configs/example/arm/starter_se.py
M src/cpu/CpuCluster.py
5 files changed, 117 insertions(+), 18 deletions(-)
diff --git a/configs/example/arm/baremetal.py
b/configs/example/arm/baremetal.py
index 0072c1d..4af1ff1 100644
--- a/configs/example/arm/baremetal.py
+++ b/configs/example/arm/baremetal.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2016-2017,2019-2021 ARM Limited
+# Copyright (c) 2016-2017,2019-2022 Arm Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -123,7 +123,13 @@
# Add CPU clusters to the system
system.cpu_cluster = [
devices.ArmCpuCluster(
- system, args.num_cores, args.cpu_freq, "1.0V",
*cpu_types[args.cpu]
+ system,
+ args.num_cores,
+ args.cpu_freq,
+ "1.0V",
+ *cpu_types[args.cpu],
+ tarmac_gen=args.tarmac_gen,
+ tarmac_dest=args.tarmac_dest,
)
]
@@ -231,6 +237,17 @@
parser.add_argument("--checkpoint", action="store_true")
parser.add_argument("--restore", type=str, default=None)
parser.add_argument(
+ "--tarmac-gen",
+ action="store_true",
+ help="Write a Tarmac trace.",
+ )
+ parser.add_argument(
+ "--tarmac-dest",
+ choices=TarmacDump.vals,
+ default="stdoutput",
+ help="Destination for the Tarmac trace output. [Default:
stdoutput]",
+ )
+ parser.add_argument(
"--dtb-gen",
action="store_true",
help="Doesn't run simulation, it generates a DTB only",
diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py
index 3f005a4..bf1f6ba 100644
--- a/configs/example/arm/devices.py
+++ b/configs/example/arm/devices.py
@@ -106,6 +106,8 @@
l1i_type,
l1d_type,
l2_type,
+ tarmac_gen=False,
+ tarmac_dest=None,
):
super().__init__()
self._cpu_type = cpu_type
@@ -120,7 +122,7 @@
clock=cpu_clock, voltage_domain=self.voltage_domain
)
- self.generate_cpus(cpu_type, num_cpus)
+ self.generate_cpus(cpu_type, num_cpus, tarmac_gen, tarmac_dest)
system.addCpuCluster(self)
@@ -177,23 +179,54 @@
class AtomicCluster(ArmCpuCluster):
- def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"):
- cpu_config = [
- ObjectList.cpu_list.get("AtomicSimpleCPU"),
- None,
- None,
- None,
- ]
- super().__init__(system, num_cpus, cpu_clock, cpu_voltage,
*cpu_config)
+ def __init__(
+ self,
+ system,
+ num_cpus,
+ cpu_clock,
+ cpu_voltage="1.0V",
+ tarmac_gen=False,
+ tarmac_dest=None,
+ ):
+ super().__init__(
+ system,
+ num_cpus,
+ cpu_clock,
+ cpu_voltage,
+ cpu_type=ObjectList.cpu_list.get("AtomicSimpleCPU"),
+ l1i_type=None,
+ l1d_type=None,
+ l2_type=None,
+ tarmac_gen=tarmac_gen,
+ tarmac_dest=tarmac_dest,
+ )
def addL1(self):
pass
class KvmCluster(ArmCpuCluster):
- def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"):
- cpu_config = [ObjectList.cpu_list.get("ArmV8KvmCPU"), None, None,
None]
- super().__init__(system, num_cpus, cpu_clock, cpu_voltage,
*cpu_config)
+ def __init__(
+ self,
+ system,
+ num_cpus,
+ cpu_clock,
+ cpu_voltage="1.0V",
+ tarmac_gen=False,
+ tarmac_dest=None,
+ ):
+ super().__init__(
+ system,
+ num_cpus,
+ cpu_clock,
+ cpu_voltage,
+ cpu_type=ObjectList.cpu_list.get("ArmV8KvmCPU"),
+ l1i_type=None,
+ l1d_type=None,
+ l2_type=None,
+ tarmac_gen=tarmac_gen,
+ tarmac_dest=tarmac_dest,
+ )
def addL1(self):
pass
diff --git a/configs/example/arm/starter_fs.py
b/configs/example/arm/starter_fs.py
index 48cbbdb..cc5f63f 100644
--- a/configs/example/arm/starter_fs.py
+++ b/configs/example/arm/starter_fs.py
@@ -129,7 +129,13 @@
# Add CPU clusters to the system
system.cpu_cluster = [
devices.ArmCpuCluster(
- system, args.num_cores, args.cpu_freq, "1.0V",
*cpu_types[args.cpu]
+ system,
+ args.num_cores,
+ args.cpu_freq,
+ "1.0V",
+ *cpu_types[args.cpu],
+ tarmac_gen=args.tarmac_gen,
+ tarmac_dest=args.tarmac_dest,
)
]
@@ -257,6 +263,17 @@
default="2GB",
help="Specify the physical memory size",
)
+ parser.add_argument(
+ "--tarmac-gen",
+ action="store_true",
+ help="Write a Tarmac trace.",
+ )
+ parser.add_argument(
+ "--tarmac-dest",
+ choices=TarmacDump.vals,
+ default="stdoutput",
+ help="Destination for the Tarmac trace output. [Default:
stdoutput]",
+ )
parser.add_argument("--checkpoint", action="store_true")
parser.add_argument("--restore", type=str, default=None)
diff --git a/configs/example/arm/starter_se.py
b/configs/example/arm/starter_se.py
index 6b4dce9..33514c7 100644
--- a/configs/example/arm/starter_se.py
+++ b/configs/example/arm/starter_se.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2016-2017, 2023 ARM Limited
+# Copyright (c) 2016-2017, 2022-2023 Arm Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -96,7 +96,13 @@
# Add CPUs to the system. A cluster of CPUs typically have
# private L1 caches and a shared L2 cache.
self.cpu_cluster = devices.ArmCpuCluster(
- self, args.num_cores, args.cpu_freq, "1.2V",
*cpu_types[args.cpu]
+ self,
+ args.num_cores,
+ args.cpu_freq,
+ "1.2V",
+ *cpu_types[args.cpu],
+ tarmac_gen=args.tarmac_gen,
+ tarmac_dest=args.tarmac_dest,
)
# Create a cache hierarchy (unless we are simulating a
@@ -215,6 +221,17 @@
default="2GB",
help="Specify the physical memory size",
)
+ parser.add_argument(
+ "--tarmac-gen",
+ action="store_true",
+ help="Write a Tarmac trace.",
+ )
+ parser.add_argument(
+ "--tarmac-dest",
+ choices=TarmacDump.vals,
+ default="stdoutput",
+ help="Destination for the Tarmac trace output. [Default:
stdoutput]",
+ )
args = parser.parse_args()
diff --git a/src/cpu/CpuCluster.py b/src/cpu/CpuCluster.py
index 42a7112..ce9383a 100644
--- a/src/cpu/CpuCluster.py
+++ b/src/cpu/CpuCluster.py
@@ -33,8 +33,10 @@
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+from m5.objects import *
from m5.params import *
from m5.objects.SubSystem import SubSystem
+from typing import Optional
class CpuCluster(SubSystem):
@@ -54,13 +56,22 @@
def __len__(self):
return len(self.cpus)
- def generate_cpus(self, cpu_type: "BaseCPU", num_cpus: int):
+ def generate_cpus(
+ self,
+ cpu_type: "BaseCPU",
+ num_cpus: int,
+ tarmac_gen: bool,
+ tarmac_dest: Optional[str],
+ ):
"""
Instantiates the cpus within the cluster provided
theit type and their number.
:param cpu_type: The cpu class
:param num_cpus: The number of cpus within the cluster
+ :param tarmac_gen: Add a Tarmac trace generator if true
+ :param tarmac_dest: The destination of the Tarmac trace, or `None`
+ to use the default.
"""
self.cpus = [
cpu_type(
@@ -73,6 +84,10 @@
cpu.createThreads()
cpu.createInterruptController()
cpu.socket_id = CpuCluster._NUM_CLUSTERS
+ if tarmac_gen:
+ cpu.tracer = TarmacTracer()
+ if tarmac_dest is not None:
+ cpu.tracer.outfile = tarmac_dest
# "Register" the cluster/cpus by augmenting the
# class variables
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0d3c523b5c0bb6d94de93bc502e4451622fb635d
Gerrit-Change-Number: 69684
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Cooper <richard.coo...@arm.com>
Gerrit-MessageType: newchange
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