See <https://jenkins.gem5.org/job/nightly/561/display/redirect?page=changes>

Changes:

[mkjost] tests: Fix failing SST and SystemC nightly tests

[mkjost] tests: Fix the nightly SST and SystemC tests

[mkjost] tests: Update nightly SystemC test


------------------------------------------
[...truncated 4.49 MB...]
 [   SHCXX] ARM/cxx_config/SnoopFilter.cc -> .os
 [   SHCXX] ARM/mem/ruby/common/Address.cc -> .os
 [   SHCXX] ARM/cxx_config/RealViewOsc.cc -> .os
 [   SHCXX] ARM/cxx_config/PciMemBar.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BasicRouter.cc -> .os
 [   SHCXX] ARM/dev/arm/rv_ctrl.cc -> .os
 [   SHCXX] ARM/cxx_config/Workload.cc -> .os
 [   SHCXX] ARM/python/_m5/param_SnoopFilter.cc -> .os
 [   SHCXX] ARM/python/_m5/param_RealViewOsc.cc -> .os
 [   SHCXX] ARM/python/_m5/param_PciMemBar.cc -> .os
 [   SHCXX] ARM/cxx_config/BasicIntLink.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Workload.cc -> .os
 [   SHCXX] ARM/cxx_config/CoherentXBar.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BaseSetAssoc.cc -> .os
 [   SHCXX] ARM/cxx_config/RealViewCtrl.cc -> .os
 [   SHCXX] ARM/cxx_config/PciLegacyIoBar.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BasicIntLink.cc -> .os
 [   SHCXX] ARM/cxx_config/TickedObject.cc -> .os
 [   SHCXX] ARM/python/_m5/param_CoherentXBar.cc -> .os
 [   SHCXX] ARM/cxx_config/BaseTags.cc -> .os
 [   SHCXX] ARM/python/_m5/param_RealViewCtrl.cc -> .os
 [   SHCXX] ARM/python/_m5/param_PciLegacyIoBar.cc -> .os
 [   SHCXX] ARM/cxx_config/BasicExtLink.cc -> .os
 [   SHCXX] ARM/python/_m5/param_TickedObject.cc -> .os
 [   SHCXX] ARM/cxx_config/NoncoherentXBar.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BaseTags.cc -> .os
 [   SHCXX] ARM/cxx_config/GenericArmPciHost.cc -> .os
 [   SHCXX] ARM/cxx_config/PciIoBar.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BasicExtLink.cc -> .os
 [   SHCXX] ARM/dev/net/dist_etherlink.cc -> .os
 [   SHCXX] ARM/python/_m5/param_FUDesc.cc -> .os
 [   SHCXX] ARM/cxx_config/ClockedObject.cc -> .os
 [   SHCXX] ARM/python/_m5/param_NoncoherentXBar.cc -> .os
 [   SHCXX] ARM/python/_m5/param_GenericArmPciHost.cc -> .os
 [   SHCXX] ARM/python/_m5/param_PciIoBar.cc -> .os
 [   SHCXX] ARM/cxx_config/BasicLink.cc -> .os
 [   SHCXX] ARM/dev/net/dist_iface.cc -> .os
 [   SHCXX] ARM/cxx_config/OpDesc.cc -> .os
 [   SHCXX] ARM/python/_m5/param_ClockedObject.cc -> .os
 [   SHCXX] ARM/cxx_config/BaseXBar.cc -> .os
 [   SHCXX] ARM/cxx_config/A9SCU.cc -> .os
 [   SHCXX] ARM/cxx_config/PciBarNone.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BasicLink.cc -> .os
 [   SHCXX] ARM/python/_m5/param_OpDesc.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BaseXBar.cc -> .os
 [   SHCXX] ARM/python/_m5/param_A9SCU.cc -> .os
 [   SHCXX] ARM/python/_m5/param_PciBarNone.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/random_rp.cc -> .os
 [   SHCXX] ARM/python/_m5/param_OutgoingRequestBridge.cc -> .os
 [   SHCXX] ARM/cxx_config/SimpleMemory.cc -> .os
 [   SHCXX] ARM/cxx_config/AmbaDmaDevice.cc -> .os
 [   SHCXX] ARM/cxx_config/PciBar.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/mru_rp.cc -> .os
 [   SHCXX] ARM/arch/generic/decoder.cc -> .os
 [   SHCXX] ARM/kern/system_events.cc -> .os
 [   SHCXX] ARM/python/_m5/param_SimpleMemory.cc -> .os
 [   SHCXX] ARM/python/_m5/param_AmbaDmaDevice.cc -> .os
 [   SHCXX] ARM/python/_m5/param_PciBar.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/lru_rp.cc -> .os
 [   SHCXX] ARM/cxx_config/SharedMemoryServer.cc -> .os
 [   SHCXX] ARM/cxx_config/AmbaIntDevice.cc -> .os
 [   SHCXX] ARM/dev/i2c/bus.cc -> .os
 [   SHCXX] ARM/cxx_config/RubyController.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/lfu_rp.cc -> .os
 [   SHCXX] ARM/kern/freebsd/events.cc -> .os
 [   SHCXX] ARM/python/_m5/param_SharedMemoryServer.cc -> .os
 [   SHCXX] ARM/python/_m5/param_AmbaIntDevice.cc -> .os
 [   SHCXX] ARM/cxx_config/I2CBus.cc -> .os
 [   SHCXX] ARM/python/_m5/param_RubyController.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/fifo_rp.cc -> .os
 [   SHCXX] ARM/cxx_config/InstDecoder.cc -> .os
 [   SHCXX] ARM/kern/linux/printk.cc -> .os
 [   SHCXX] ARM/cxx_config/AmbaPioDevice.cc -> .os
 [   SHCXX] ARM/python/_m5/param_I2CBus.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/dueling_rp.cc -> .os
 [   SHCXX] ARM/python/_m5/param_InstDecoder.cc -> .os
 [   SHCXX] ARM/kern/linux/helpers.cc -> .os
 [   SHCXX] ARM/python/_m5/param_AmbaPioDevice.cc -> .os
 [   SHCXX] ARM/cxx_config/I2CDevice.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/brrip_rp.cc -> .os
 [   SHCXX] ARM/kern/linux/linux.cc -> .os
 [   SHCXX] ARM/cxx_config/ExternalSlave.cc -> .os
 [   SHCXX] ARM/python/_m5/param_I2CDevice.cc -> .os
 [   SHCXX] ARM/python/_m5/param_ScmiChannel.cc -> .os
 [   SHCXX] ARM/mem/ruby/structures/BankedArray.cc -> .os
 [   SHCXX] ARM/mem/cache/replacement_policies/bip_rp.cc -> .os
 [   SHCXX] ARM/cxx_config/BaseTLB.cc -> .os
 [   SHCXX] ARM/kern/linux/events.cc -> .os
 [   SHCXX] ARM/python/_m5/param_ExternalSlave.cc -> .os
 [   SHCXX] ARM/cxx_config/Gicv3.cc -> .os
 [   SHCXX] ARM/cxx_config/MHU.cc -> .os
 [   SHCXX] ARM/mem/ruby/structures/TimerTable.cc -> .os
 [   SHCXX] ARM/cxx_config/WeightedLRURP.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BaseTLB.cc -> .os
 [   SHCXX] ARM/cxx_config/ExternalMaster.cc -> .os
 [   SHCXX] ARM/python/_m5/param_MHU.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Gicv3.cc -> .os
 [   SHCXX] ARM/mem/ruby/structures/RubyPrefetcher.cc -> .os
 [   SHCXX] ARM/python/_m5/param_WeightedLRURP.cc -> .os
 [   SHCXX] ARM/cxx_config/BaseMMU.cc -> .os
 [   SHCXX] ARM/python/_m5/param_ExternalMaster.cc -> .os
 [   SHCXX] ARM/cxx_config/Gicv3Its.cc -> .os
 [   SHCXX] ARM/cxx_config/Ap2ScpDoorbell.cc -> .os
 [   SHCXX] ARM/cxx_config/TreePLRURP.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BaseMMU.cc -> .os
 [   SHCXX] ARM/cxx_config/NVMInterface.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Ap2ScpDoorbell.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Gicv3Its.cc -> .os
 [   SHCXX] ARM/dev/serial/uart8250.cc -> .os
 [   SHCXX] ARM/mem/ruby/structures/WireBuffer.cc -> .os
 [   SHCXX] ARM/cxx_config/BaseISA.cc -> .os
 [   SHCXX] ARM/python/_m5/param_NVMInterface.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/tagged.cc -> .os
 [   SHCXX] ARM/cxx_config/Scp2ApDoorbell.cc -> .os
 [   SHCXX] ARM/cxx_config/VGic.cc -> .os
 [   SHCXX] ARM/dev/serial/uart.cc -> .os
 [   SHCXX] ARM/mem/ruby/structures/CacheMemory.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BaseISA.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/stride.cc -> .os
 [   SHCXX] ARM/python/_m5/param_VGic.cc -> .os
 [   SHCXX] ARM/dev/serial/terminal.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Scp2ApDoorbell.cc -> .os
 [   SHCXX] ARM/cxx_config/BaseInterrupts.cc -> .os
 [   SHCXX] ARM/mem/qos/mem_sink.cc -> .os
 [   SHCXX] ARM/cxx_config/DRAMInterface.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/spatio_temporal_memory_streaming.cc -> .os
 [   SHCXX] ARM/cxx_config/Gicv2m.cc -> .os
 [   SHCXX] ARM/dev/serial/simple.cc -> .os
 [   SHCXX] ARM/cxx_config/MhuDoorbell.cc -> .os
 [   SHCXX] ARM/python/_m5/param_BaseInterrupts.cc -> .os
 [   SHCXX] ARM/mem/qos/mem_ctrl.cc -> .os
 [   SHCXX] ARM/python/_m5/param_DRAMInterface.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/slim_ampm.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Gicv2m.cc -> .os
 [   SHCXX] ARM/dev/serial/serial.cc -> .os
 [   SHCXX] ARM/python/_m5/param_MhuDoorbell.cc -> .os
 [   SHCXX] ARM/arch/generic/mmu.cc -> .os
 [   SHCXX] ARM/mem/qos/q_policy.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/signature_path_v2.cc -> .os
 [   SHCXX] ARM/cxx_config/Uart8250.cc -> .os
 [   SHCXX] ARM/cxx_config/Gicv2mFrame.cc -> .os
 [   SHCXX] ARM/mem/qos/turnaround_policy_ideal.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/MemoryMsg.cc -> .os
 [   SHCXX] ARM/cxx_config/MemInterface.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/signature_path.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Uart8250.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Gicv2mFrame.cc -> .os
 [   SHCXX] ARM/mem/qos/policy_pf.cc -> .os
 [   SHCXX] ARM/python/_m5/param_MemInterface.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/sbooe.cc -> .os
 [   SHCXX] ARM/cxx_config/SimpleUart.cc -> .os
 [   SHCXX] ARM/cxx_config/GicV2.cc -> .os
 [   SHCXX] ARM/mem/qos/policy_fixed_prio.cc -> .os
 [   SHCXX] ARM/cxx_config/HBMCtrl.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/queued.cc -> .os
 [   SHCXX] ARM/python/_m5/param_SimpleUart.cc -> .os
 [   SHCXX] ARM/python/_m5/param_GicV2.cc -> .os
 [   SHCXX] ARM/mem/cache/write_queue_entry.cc -> .os
 [   SHCXX] ARM/mem/qos/policy.cc -> .os
 [   SHCXX] ARM/python/_m5/param_HBMCtrl.cc -> .os
 [   SHCXX] ARM/mem/cache/prefetch/pif.cc -> .os
 [   SHCXX] ARM/cxx_config/ArmSigInterruptPin.cc -> .os
 [   SHCXX] ARM/python/_m5/param_TAGE_SC_L_TAGE.cc -> .os
 [   SHCXX] ARM/enums/SMTFetchPolicy.cc -> .os
 [CXXCPRHH] m5.objects.InstTracer, InstTracer -> ARM/cxx_config/InstTracer.hh
 [   SHCXX] ARM/python/_m5/param_PL031.cc -> .os
 [CXXCPRHH] m5.objects.BaseMemProbe, BaseMemProbe -> 
ARM/cxx_config/BaseMemProbe.hh
 [CXXCPRHH] m5.objects.ArmDecoder, ArmDecoder -> ARM/cxx_config/ArmDecoder.hh
 [   SHCXX] ARM/cxx_config/InstTracer.cc -> .os
 [CXXCPRHH] m5.objects.Uart, Uart -> ARM/cxx_config/Uart.hh
 [   SHCXX] ARM/cxx_config/BaseMemProbe.cc -> .os
 [SO Param] m5.objects.CfiMemory, CfiMemory -> ARM/params/CfiMemory.hh
 [CXXCPRCC] m5.objects.QoSTurnaround, QoSTurnaroundPolicyIdeal -> 
ARM/cxx_config/QoSTurnaroundPolicyIdeal.cc
 [   SHCXX] ARM/cxx_config/ArmDecoder.cc -> .os
 [   SHCXX] ARM/cxx_config/Uart.cc -> .os
 [SO Param] m5.objects.Sequencer, RubySequencer -> ARM/params/RubySequencer.hh
 [   SHCXX] ARM/python/_m5/param_CfiMemory.cc -> .os
 [CXXCPRHH] m5.objects.QoSTurnaround, QoSTurnaroundPolicyIdeal -> 
ARM/cxx_config/QoSTurnaroundPolicyIdeal.hh
 [   SHCXX] ARM/python/_m5/param_RubyHTMSequencer.cc -> .os
 [   SHCXX] ARM/mem/ruby/system/HTMSequencer.cc -> .os
 [   SHCXX] ARM/cxx_config/RubySequencer.cc -> .os
 [   SHCXX] ARM/cxx_config/QoSTurnaroundPolicyIdeal.cc -> .os
 [   SHCXX] ARM/mem/ruby/slicc_interface/AbstractController.cc -> .os
 [   SHCXX] ARM/mem/ruby/system/Sequencer.cc -> .os
 [   SHCXX] ARM/python/_m5/param_RubySequencer.cc -> .os
 [   SHCXX] ARM/mem/ruby/profiler/Profiler.cc -> .os
 [   SHCXX] ARM/cxx_config/RubyHTMSequencer.cc -> .os
 [   SHCXX] ARM/mem/ruby/system/RubySystem.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/MachineType.cc -> .os
 [   SHCXX] ARM/cxx_config/MiscNode_Controller.cc -> .os
 [   SHCXX] ARM/cxx_config/Memory_Controller.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/Cache_Wakeup.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/Memory_Transitions.cc -> .os
 [   SHCXX] ARM/cxx_config/Cache_Controller.cc -> .os
 [   SHCXX] ARM/python/_m5/param_MiscNode_Controller.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Cache_Controller.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/MiscNode_Controller.cc -> .os
 [   SHCXX] ARM/python/_m5/param_Memory_Controller.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/Cache_Transitions.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/MiscNode_Wakeup.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/Cache_Controller.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/Memory_Controller.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/Memory_Wakeup.cc -> .os
 [   SHCXX] ARM/mem/ruby/protocol/MiscNode_Transitions.cc -> .os
 [   SHCXX] ARM/mem/ruby/system/CacheRecorder.cc -> .os
 [   SHCXX] ARM/cxx_config/CfiMemory.cc -> .os
 [   SHCXX] ARM/mem/cfi_mem.cc -> .os
 [SO Param] m5.objects.PS2, PS2TouchKit -> ARM/python/_m5/param_PS2TouchKit.cc
 [   SHCXX] ARM/python/_m5/param_PS2TouchKit.cc -> .os
 [   SHCXX] ARM/base/date.cc -> .os
 [  SHLINK]  -> ARM/libgem5_opt.so
scons: done building targets.
*** Summary of Warnings ***
Warning: Header file <png.h> not found.
         This host has no libpng library.
         Disabling support for PNG framebuffers.
Warning: Couldn't find HDF5 C++ libraries. Disabling HDF5 support.
Warning: While checking protoc version: [Errno 2] No such file or directory:
         'protoc'
Warning: Protocol buffer compiler (protoc) not found.
         Please install protobuf-compiler for tracing support.
+ docker run -u 118: --volume 
/nobackup/jenkins/workspace/nightly/tests/..:/nobackup/jenkins/workspace/nightly/tests/..
 -w /nobackup/jenkins/workspace/nightly/tests/.. --memory=18g --rm 
gcr.io/gem5-test/systemc-env:latest bash -c 'cd 
util/systemc/gem5_within_systemc && make -j24 && ../../../build/ARM/gem5.opt 
../../../configs/deprecated/example/se.py -c     
../../../tests/test-progs/hello/bin/arm/linux/hello && 
LD_LIBRARY_PATH=../../../build/ARM/:/opt/systemc/lib-linux64/     ./gem5.opt.sc 
m5out/config.ini && cd -; '
g++ -I../../../build/ARM -L../../../build/ARM -I../../../ext/ 
-I/opt/systemc/include -L/opt/systemc/lib-linux64 -std=c++17 -g -DTRACING_ON -c 
-o main.o main.cc
g++ -I../../../build/ARM -L../../../build/ARM -I../../../ext/ 
-I/opt/systemc/include -L/opt/systemc/lib-linux64 -std=c++17 -g -DTRACING_ON -c 
-o stats.o stats.cc
g++ -I../../../build/ARM -L../../../build/ARM -I../../../ext/ 
-I/opt/systemc/include -L/opt/systemc/lib-linux64 -std=c++17 -g -DTRACING_ON -c 
-o sc_gem5_control.o sc_gem5_control.cc
g++ -I../../../build/ARM -L../../../build/ARM -I../../../ext/ 
-I/opt/systemc/include -L/opt/systemc/lib-linux64 -std=c++17 -g -DTRACING_ON -c 
-o sc_logger.o sc_logger.cc
g++ -I../../../build/ARM -L../../../build/ARM -I../../../ext/ 
-I/opt/systemc/include -L/opt/systemc/lib-linux64 -std=c++17 -g -DTRACING_ON -c 
-o sc_module.o sc_module.cc
g++ -I../../../build/ARM -L../../../build/ARM -I../../../ext/ 
-I/opt/systemc/include -L/opt/systemc/lib-linux64 -std=c++17 -g -DTRACING_ON -o 
gem5.opt.sc main.o stats.o sc_gem5_control.o sc_logger.o sc_module.o -lgem5_opt 
-lsystemc -lpng
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`timer_delete@GLIBC_2.34'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`lstat64@GLIBC_2.33'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`pthread_kill@GLIBC_2.34'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`stat64@GLIBC_2.33'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`timer_settime@GLIBC_2.34'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`__libc_single_threaded@GLIBC_2.32'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`std::condition_variable::wait(std::unique_lock<std::mutex>&)@GLIBCXX_3.4.30'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`mknod@GLIBC_2.33'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`fstat64@GLIBC_2.33'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`std::__istream_extract(std::istream&, char*, long)@GLIBCXX_3.4.29'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`pthread_sigmask@GLIBC_2.32'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`timer_create@GLIBC_2.34'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`std::__throw_bad_array_new_length()@GLIBCXX_3.4.29'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`stat@GLIBC_2.33'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`fstat@GLIBC_2.33'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`shm_unlink@GLIBC_2.34'
/usr/bin/ld: ../../../build/ARM/libgem5_opt.so: undefined reference to 
`shm_open@GLIBC_2.34'
collect2: error: ld returned 1 exit status
make: *** [Makefile:63: gem5.opt.sc] Error 1
Build step 'Execute shell' marked build as failure
Archiving artifacts
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