Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/43886 )

Change subject: dev,arch-x86: Simplify the relationship between the PC and SouthBridge.
......................................................................

dev,arch-x86: Simplify the relationship between the PC and SouthBridge.

The SouthBridge used to have a parameter to point back at a Platform
object which it would dynamically cast to the Pc platform type, and it
would use that to tell the Pc platform where it was. The Pc platform
would then configure initial values in the SouthBridge during the init
phase. Now, the Pc platform has a parameter which by default
instantiates a SouthBridge, so that it will have a pointer
automatically. The Pc object knows it will have a SouthBridge, and now
the SouthBridge no longer has to assume that it's housed inside a Pc
platform.

Also, the SouthBridge device had instantiated a lot of child objects,
and then to ensure that they were accessible in c++, they were also set
as parameters on the object. Now, these children are created as the
default value for those parameters. They no longer have to be declared
and then separately hooked up as parameters. They could also
theoretically be replaced more easily since they're now only defaults,
although in practice that's unlikely.

Change-Id: I296b18a55ab6aedbb609ca4f545f7b19c21fd905
---
M src/dev/x86/Pc.py
M src/dev/x86/SouthBridge.py
M src/dev/x86/pc.cc
M src/dev/x86/south_bridge.cc
M src/dev/x86/south_bridge.hh
5 files changed, 20 insertions(+), 32 deletions(-)



diff --git a/src/dev/x86/Pc.py b/src/dev/x86/Pc.py
index 736f068..767c697 100644
--- a/src/dev/x86/Pc.py
+++ b/src/dev/x86/Pc.py
@@ -50,7 +50,7 @@
     cxx_header = "dev/x86/pc.hh"
     system = Param.System(Parent.any, "system")

-    south_bridge = SouthBridge()
+    south_bridge = Param.SouthBridge(SouthBridge(), "Southbridge")
     pci_host = PcPciHost()

     # Serial port and terminal
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index 3768215..d10a0cf 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -44,26 +44,22 @@
 class SouthBridge(SimObject):
     type = 'SouthBridge'
     cxx_header = "dev/x86/south_bridge.hh"
- platform = Param.Platform(Parent.any, "Platform this device is part of")

-    _pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
-    _pic2 = I8259(pio_addr=x86IOAddress(0xA0), mode='I8259Slave')
-    _cmos = Cmos(pio_addr=x86IOAddress(0x70))
-    _dma1 = I8237(pio_addr=x86IOAddress(0x0))
-    _keyboard = I8042(data_port=x86IOAddress(0x60), \
-            command_port=x86IOAddress(0x64))
-    _pit = I8254(pio_addr=x86IOAddress(0x40))
-    _speaker = PcSpeaker(pio_addr=x86IOAddress(0x61))
-    _io_apic = I82094AA(pio_addr=0xFEC00000)
-
-    pic1 = Param.I8259(_pic1, "Master PIC")
-    pic2 = Param.I8259(_pic2, "Slave PIC")
-    cmos = Param.Cmos(_cmos, "CMOS memory and real time clock device")
-    dma1 = Param.I8237(_dma1, "The first dma controller")
-    keyboard = Param.I8042(_keyboard, "The keyboard controller")
-    pit = Param.I8254(_pit, "Programmable interval timer")
-    speaker = Param.PcSpeaker(_speaker, "PC speaker")
-    io_apic = Param.I82094AA(_io_apic, "I/O APIC")
+ pic1 = Param.I8259(I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master'),
+            "Master PIC")
+ pic2 = Param.I8259(I8259(pio_addr=x86IOAddress(0xA0), mode='I8259Slave'),
+            "Slave PIC")
+    cmos = Param.Cmos(Cmos(pio_addr=x86IOAddress(0x70)),
+            "CMOS memory and real time clock device")
+    dma1 = Param.I8237(I8237(pio_addr=x86IOAddress(0x0)),
+            "The first dma controller")
+    keyboard = Param.I8042(I8042(data_port=x86IOAddress(0x60), \
+            command_port=x86IOAddress(0x64)), "The keyboard controller")
+    pit = Param.I8254(I8254(pio_addr=x86IOAddress(0x40)),
+            "Programmable interval timer")
+    speaker = Param.PcSpeaker(PcSpeaker(pio_addr=x86IOAddress(0x61)),
+            "PC speaker")
+    io_apic = Param.I82094AA(I82094AA(pio_addr=0xFEC00000), "I/O APIC")

     # IDE controller
     ide = IdeController(disks=[], pci_func=0, pci_dev=4, pci_bus=0)
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index 85b9ddb..7df442b 100644
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -40,7 +40,7 @@
 #include "dev/x86/south_bridge.hh"
 #include "sim/system.hh"

-Pc::Pc(const Params &p) : Platform(p)
+Pc::Pc(const Params &p) : Platform(p), southBridge(p.south_bridge)
 {}

 void
diff --git a/src/dev/x86/south_bridge.cc b/src/dev/x86/south_bridge.cc
index 6039609..4229f4c 100644
--- a/src/dev/x86/south_bridge.cc
+++ b/src/dev/x86/south_bridge.cc
@@ -35,11 +35,6 @@
 using namespace X86ISA;

 SouthBridge::SouthBridge(const Params &p) : SimObject(p),
-    platform(p.platform), pit(p.pit), pic1(p.pic1), pic2(p.pic2),
-    cmos(p.cmos), speaker(p.speaker), ioApic(p.io_apic)
-{
-    // Let the platform know where we are
-    Pc *pc = dynamic_cast<Pc *>(platform);
-    assert(pc);
-    pc->southBridge = this;
-}
+ pit(p.pit), pic1(p.pic1), pic2(p.pic2), cmos(p.cmos), speaker(p.speaker),
+    ioApic(p.io_apic)
+{}
diff --git a/src/dev/x86/south_bridge.hh b/src/dev/x86/south_bridge.hh
index 36c9551..2f63052 100644
--- a/src/dev/x86/south_bridge.hh
+++ b/src/dev/x86/south_bridge.hh
@@ -45,9 +45,6 @@

 class SouthBridge : public SimObject
 {
-  protected:
-    Platform *platform;
-
   public:
     X86ISA::I8254 *pit;
     X86ISA::I8259 *pic1;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I296b18a55ab6aedbb609ca4f545f7b19c21fd905
Gerrit-Change-Number: 43886
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
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