Tiago Mück has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/41157 )

Change subject: mem-ruby: add TBEStorage structure
......................................................................

mem-ruby: add TBEStorage structure

The TBEStorage is used to track the resources consumed by the TBETable,
i.e. the number of available TBE slots.

structure(TBEStorage, external ="yes") {
    int size();
    int capacity();
    int reserved();
    int slotsAvailable();
    bool areNSlotsAvailable(int n);
    void incrementReserved();
    void decrementReserved();
    int addEntryToNewSlot();
    void addEntryToSlot(int slot);
    void removeEntryFromSlot(int slot);
}

TBEStorage resource tracking has two main differences from TBETable:

1) Allows slot reservation. This is useful to implement protocols that
employ retry/credit messages instead of stall when the controller runs
out of TBEs to accept new request.

2) Can also assign multiple entries to the same slot. This is useful to
more easily model cases where multiple transactions share the same TBE
resource (i.e. the slot).
E.g: a request that triggers a replacement in a system without
dedicated WB/Eviction buffer; both transactions can can have separate
logical TBEs associated to the same slot.

The motivation for having a separate structures for tracking TBEs
availability are twofold:

- Keeps TBETable simple and without the additional overhead for
protocols that do not need these additional features.

- Having two separate transactions sharing the same TBE resource using
the current TBETable would be cumbersome since the TBETable is indexed
by the transaction address.

Change-Id: I64106d50068320bc925243732ef8ff9ef0b6c4bf
Signed-off-by: Tiago Mück <tiago.m...@arm.com>
---
M src/mem/ruby/SConscript
M src/mem/ruby/structures/SConscript
A src/mem/ruby/structures/TBEStorage.cc
A src/mem/ruby/structures/TBEStorage.hh
M src/mem/slicc/symbols/StateMachine.py
5 files changed, 206 insertions(+), 1 deletion(-)



diff --git a/src/mem/ruby/SConscript b/src/mem/ruby/SConscript
index aab0355..bde71c0 100644
--- a/src/mem/ruby/SConscript
+++ b/src/mem/ruby/SConscript
@@ -125,6 +125,7 @@
 MakeInclude('structures/PerfectCacheMemory.hh')
 MakeInclude('structures/PersistentTable.hh')
 MakeInclude('structures/RubyPrefetcher.hh')
+MakeInclude('structures/TBEStorage.hh')
 MakeInclude('structures/TBETable.hh')
 MakeInclude('structures/TimerTable.hh')
 MakeInclude('structures/WireBuffer.hh')
diff --git a/src/mem/ruby/structures/SConscript b/src/mem/ruby/structures/SConscript
index 0cf0559..546326b 100644
--- a/src/mem/ruby/structures/SConscript
+++ b/src/mem/ruby/structures/SConscript
@@ -43,3 +43,4 @@
 Source('RubyPrefetcher.cc')
 Source('TimerTable.cc')
 Source('BankedArray.cc')
+Source('TBEStorage.cc')
diff --git a/src/mem/ruby/structures/TBEStorage.cc b/src/mem/ruby/structures/TBEStorage.cc
new file mode 100644
index 0000000..5feb64e
--- /dev/null
+++ b/src/mem/ruby/structures/TBEStorage.cc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2021 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <mem/ruby/structures/TBEStorage.hh>
+
+TBEStorage::TBEStorage(int number_of_TBEs)
+    :m_reserved(0)
+{
+    for (int i = 0; i < number_of_TBEs; ++i)
+        m_slots_avail.push(i);
+}
+
+void
+TBEStorage::regStats(const std::string &name)
+{
+    m_avg_size.name(name + ".avg_size");
+    m_avg_util.name(name + ".avg_util");
+    m_avg_reserved.name(name + ".avg_reserved");
+}
diff --git a/src/mem/ruby/structures/TBEStorage.hh b/src/mem/ruby/structures/TBEStorage.hh
new file mode 100644
index 0000000..2b21191
--- /dev/null
+++ b/src/mem/ruby/structures/TBEStorage.hh
@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2021 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __MEM_RUBY_STRUCTURES_TBESTORAGE_HH__
+#define __MEM_RUBY_STRUCTURES_TBESTORAGE_HH__
+
+#include <cassert>
+#include <stack>
+#include <unordered_map>
+
+#include <base/statistics.hh>
+
+class TBEStorage {
+  public:
+    TBEStorage(int number_of_TBEs);
+
+    int size() const { return m_slots_used.size(); }
+
+ int capacity() const { return m_slots_used.size() + m_slots_avail.size(); }
+
+    int reserved() const { return m_reserved; }
+
+ int slotsAvailable() const { return m_slots_avail.size() - m_reserved; }
+
+    float utilization() const { return size() / (float)capacity(); }
+
+    bool areNSlotsAvailable(int n, Tick current_time = 0) const;
+
+    void incrementReserved();
+
+    void decrementReserved();
+
+    int addEntryToNewSlot();
+
+    void addEntryToSlot(int slot);
+
+    void removeEntryFromSlot(int slot);
+
+    void regStats(const std::string &name);
+
+  private:
+    int m_reserved;
+    std::stack<int> m_slots_avail;
+    std::unordered_map<int, int> m_slots_used;
+
+    Stats::Average m_avg_size;
+    Stats::Average m_avg_util;
+    Stats::Average m_avg_reserved;
+
+ };
+
+inline bool
+TBEStorage::areNSlotsAvailable(int n, Tick current_time) const
+{
+    return slotsAvailable() >= n;
+}
+
+inline void
+TBEStorage::incrementReserved()
+{
+    ++m_reserved;
+    m_avg_reserved = m_reserved;
+}
+
+inline void
+TBEStorage::decrementReserved()
+{
+    assert(m_reserved > 0);
+    --m_reserved;
+    m_avg_reserved = m_reserved;
+}
+
+inline int
+TBEStorage::addEntryToNewSlot()
+{
+    assert(slotsAvailable() > 0);
+    assert(m_slots_avail.size() > 0);
+    int slot = m_slots_avail.top();
+    m_slots_used[slot] = 1;
+    m_slots_avail.pop();
+    m_avg_size = size();
+    m_avg_util = utilization();
+    return slot;
+}
+
+inline void
+TBEStorage::addEntryToSlot(int slot)
+{
+    auto iter = m_slots_used.find(slot);
+    assert(iter != m_slots_used.end());
+    iter->second += 1;
+}
+
+inline void
+TBEStorage::removeEntryFromSlot(int slot)
+{
+    auto iter = m_slots_used.find(slot);
+    assert(iter != m_slots_used.end());
+    assert(iter->second > 0);
+    iter->second -= 1;
+    if (iter->second == 0) {
+        m_slots_used.erase(iter);
+        m_slots_avail.push(slot);
+    }
+    m_avg_size = size();
+    m_avg_util = utilization();
+}
+
+#endif
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 23f8707..2990612 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2019-2020 ARM Limited
+# Copyright (c) 2019-2021 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -809,6 +809,13 @@
 $c_ident::regStats()
 {
     AbstractController::regStats();
+''')
+        for var in self.objects:
+            if var.type.ident == 'TBEStorage':
+                vident = var.ident
+                vcident = "m_%s_ptr" % var.ident
+                code('$vcident->regStats(name() + ".$vident");')
+        code('''

     // For each type of controllers, one controller of that type is picked
     // to aggregate stats of all controllers of that type.

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I64106d50068320bc925243732ef8ff9ef0b6c4bf
Gerrit-Change-Number: 41157
Gerrit-PatchSet: 1
Gerrit-Owner: Tiago Mück <tiago.m...@arm.com>
Gerrit-MessageType: newchange
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