Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40495 )

Change subject: sim: Get rid of the IsConforming type trait template.
......................................................................

sim: Get rid of the IsConforming type trait template.

The idea of this template was to distinguish types which should
grow/shrink based on the native size of the ABI in question. Or in other
words, if the ABI was 32 bit, the type should also be 32 bit, or 64 bit
and 64 bit.

Unfortunately, I had intended for Addr to be a conforming type (since
local pointers would be conforming), but uint64_t not to be. Since Addr
is defined as a typedef of uint64_t, the compiler would make *both*
types conforming, giving incorrect behavior on 32 bit systems.

Local pointers will need to be handled in a different way, likely with
the VPtr template, so that they will be treated correctly and not like
an explicitly 64 bit data type.

Change-Id: Idfdd5351260b48bb531a1926b93e0478a297826d
---
M src/arch/arm/aapcs32.hh
M src/sim/syscall_abi.hh
2 files changed, 6 insertions(+), 37 deletions(-)



diff --git a/src/arch/arm/aapcs32.hh b/src/arch/arm/aapcs32.hh
index a0f09b8..a1345bd 100644
--- a/src/arch/arm/aapcs32.hh
+++ b/src/arch/arm/aapcs32.hh
@@ -160,9 +160,7 @@
     static void
     store(ThreadContext *tc, const Integer &i)
     {
-        if (std::is_same<Integer, Addr>::value) {
-            tc->setIntReg(ArmISA::INTREG_R0, (uint32_t)i);
-        } else if (ArmISA::byteOrder(tc) == ByteOrder::little) {
+        if (ArmISA::byteOrder(tc) == ByteOrder::little) {
             tc->setIntReg(ArmISA::INTREG_R0, (uint32_t)(i >> 0));
             tc->setIntReg(ArmISA::INTREG_R1, (uint32_t)(i >> 32));
         } else {
@@ -199,11 +197,6 @@
     static Integer
     get(ThreadContext *tc, Aapcs32::State &state)
     {
-        if (std::is_same<Integer, Addr>::value &&
-                state.ncrn <= state.MAX_CRN) {
-            return tc->readIntReg(state.ncrn++);
-        }
-
         if (alignof(Integer) == 8 && (state.ncrn % 2))
             state.ncrn++;

diff --git a/src/sim/syscall_abi.hh b/src/sim/syscall_abi.hh
index 984f0e0..021e7b0 100644
--- a/src/sim/syscall_abi.hh
+++ b/src/sim/syscall_abi.hh
@@ -36,18 +36,6 @@

 class SyscallDesc;

-namespace GuestABI
-{
-
-// Does this normally 64 bit data type shrink down to 32 bits for 32 bit ABIs?
-template <typename T, typename Enabled=void>
-struct IsConforming : public std::false_type {};
-
-template <>
-struct IsConforming<Addr> : public std::true_type {};
-
-} // namespace GuestABI
-
 struct GenericSyscallABI
 {
     using State = int;
@@ -60,25 +48,13 @@
 {
     // Is this argument too big for a single register?
     template <typename T, typename Enabled=void>
-    struct IsWide;
+    struct IsWide : public std::false_type {};

     template <typename T>
-    struct IsWide<T, typename std::enable_if_t<
-        std::is_integral<T>::value &&
-        (sizeof(T) < sizeof(uint64_t) ||
-         GuestABI::IsConforming<T>::value)>>
-    {
-        static const bool value = false;
-    };
-
-    template <typename T>
-    struct IsWide<T, typename std::enable_if_t<
-        std::is_integral<T>::value &&
-        sizeof(T) == sizeof(uint64_t) &&
-        !GuestABI::IsConforming<T>::value>>
-    {
-        static const bool value = true;
-    };
+    struct IsWide<T> : public typename std::enable_if_t<
+        std::is_integral<T>::value && sizeof(T) > sizeof(uint32_t),
+        std::true_type>
+    {};

     // Read two registers and merge them into one value.
     static uint64_t

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/40495
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Idfdd5351260b48bb531a1926b93e0478a297826d
Gerrit-Change-Number: 40495
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
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