Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/40102 )
Change subject: arch: Make some internal decode methods protected.
......................................................................
arch: Make some internal decode methods protected.
These methods aren't used outside of the decoder and the decode cache,
so they don't need to be public.
Change-Id: Ifdaf318995f1bb0a75b390bd1c5fde1211c66e62
---
M src/arch/arm/decoder.hh
M src/arch/mips/decoder.hh
M src/arch/power/decoder.hh
M src/arch/riscv/decoder.hh
M src/arch/sparc/decoder.hh
M src/arch/x86/decoder.hh
6 files changed, 53 insertions(+), 48 deletions(-)
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index 1f14328..53e3f76 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -82,6 +82,7 @@
/// A cache of decoded instruction objects.
static GenericISA::BasicDecodeCache<Decoder, ExtMachInst> defaultCache;
+ friend class GenericISA::BasicDecodeCache<Decoder, ExtMachInst>;
/**
* Pre-decode an instruction from the current state of the
@@ -95,6 +96,38 @@
*/
void consumeBytes(int numBytes);
+ /**
+ * Decode a machine instruction without calling the cache.
+ *
+ * @note The implementation of this method is generated by the ISA
+ * parser script.
+ *
+ * @warn This method takes a pre-decoded instruction as its
+ * argument. It should typically not be called directly.
+ *
+ * @param mach_inst The binary instruction to decode.
+ * @retval A pointer to the corresponding StaticInst object.
+ */
+ StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+ /**
+ * Decode a pre-decoded machine instruction.
+ *
+ * @warn This method takes a pre-decoded instruction as its
+ * argument. It should typically not be called directly.
+ *
+ * @param mach_inst A pre-decoded instruction
+ * @retval A pointer to the corresponding StaticInst object.
+ */
+ StaticInstPtr
+ decode(ExtMachInst mach_inst, Addr addr)
+ {
+ StaticInstPtr si = defaultCache.decode(this, mach_inst, addr);
+ DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
+ si->getName(), mach_inst);
+ return si;
+ }
+
public: // Decoder API
Decoder(ISA* isa = nullptr);
@@ -162,38 +195,6 @@
StaticInstPtr decode(ArmISA::PCState &pc);
/**
- * Decode a pre-decoded machine instruction.
- *
- * @warn This method takes a pre-decoded instruction as its
- * argument. It should typically not be called directly.
- *
- * @param mach_inst A pre-decoded instruction
- * @retval A pointer to the corresponding StaticInst object.
- */
- StaticInstPtr
- decode(ExtMachInst mach_inst, Addr addr)
- {
- StaticInstPtr si = defaultCache.decode(this, mach_inst, addr);
- DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
- si->getName(), mach_inst);
- return si;
- }
-
- /**
- * Decode a machine instruction without calling the cache.
- *
- * @note The implementation of this method is generated by the ISA
- * parser script.
- *
- * @warn This method takes a pre-decoded instruction as its
- * argument. It should typically not be called directly.
- *
- * @param mach_inst The binary instruction to decode.
- * @retval A pointer to the corresponding StaticInst object.
- */
- StaticInstPtr decodeInst(ExtMachInst mach_inst);
-
- /**
* Take over the state from an old decoder when switching CPUs.
*
* @param old Decoder used in old CPU
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 6e00bc3..969c152 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -89,8 +89,8 @@
protected:
/// A cache of decoded instruction objects.
static GenericISA::BasicDecodeCache<Decoder, ExtMachInst> defaultCache;
+ friend class GenericISA::BasicDecodeCache<Decoder, ExtMachInst>;
- public:
StaticInstPtr decodeInst(ExtMachInst mach_inst);
/// Decode a machine instruction.
@@ -105,6 +105,7 @@
return si;
}
+ public:
StaticInstPtr
decode(MipsISA::PCState &nextPC)
{
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index ecbee72..e7dbd24 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -96,8 +96,8 @@
protected:
/// A cache of decoded instruction objects.
static GenericISA::BasicDecodeCache<Decoder, ExtMachInst> defaultCache;
+ friend class GenericISA::BasicDecodeCache<Decoder, ExtMachInst>;
- public:
StaticInstPtr decodeInst(ExtMachInst mach_inst);
/// Decode a machine instruction.
@@ -112,6 +112,7 @@
return si;
}
+ public:
StaticInstPtr
decode(PowerISA::PCState &nextPC)
{
diff --git a/src/arch/riscv/decoder.hh b/src/arch/riscv/decoder.hh
index 23c3c38..173b4c7 100644
--- a/src/arch/riscv/decoder.hh
+++ b/src/arch/riscv/decoder.hh
@@ -56,6 +56,13 @@
ExtMachInst emi;
bool instDone;
+ StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+ /// Decode a machine instruction.
+ /// @param mach_inst The binary instruction to decode.
+ /// @retval A pointer to the corresponding StaticInst object.
+ StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
+
public:
Decoder(ISA* isa=nullptr) { reset(); }
@@ -72,13 +79,6 @@
bool instReady() { return instDone; }
void takeOverFrom(Decoder *old) {}
- StaticInstPtr decodeInst(ExtMachInst mach_inst);
-
- /// Decode a machine instruction.
- /// @param mach_inst The binary instruction to decode.
- /// @retval A pointer to the corresponding StaticInst object.
- StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
-
StaticInstPtr decode(RiscvISA::PCState &nextPC);
};
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 523d264..0c9f719 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -103,8 +103,8 @@
protected:
/// A cache of decoded instruction objects.
static GenericISA::BasicDecodeCache<Decoder, ExtMachInst> defaultCache;
+ friend class GenericISA::BasicDecodeCache<Decoder, ExtMachInst>;
- public:
StaticInstPtr decodeInst(ExtMachInst mach_inst);
/// Decode a machine instruction.
@@ -119,6 +119,7 @@
return si;
}
+ public:
StaticInstPtr
decode(SparcISA::PCState &nextPC)
{
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 94ebd0c..c9ff3ce 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -241,6 +241,13 @@
CacheKey, DecodeCache::InstMap<ExtMachInst> *> InstCacheMap;
static InstCacheMap instCacheMap;
+ StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+ /// Decode a machine instruction.
+ /// @param mach_inst The binary instruction to decode.
+ /// @retval A pointer to the corresponding StaticInst object.
+ StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
+
public:
Decoder(ISA *isa=nullptr)
{
@@ -328,12 +335,6 @@
}
public:
- StaticInstPtr decodeInst(ExtMachInst mach_inst);
-
- /// Decode a machine instruction.
- /// @param mach_inst The binary instruction to decode.
- /// @retval A pointer to the corresponding StaticInst object.
- StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
StaticInstPtr decode(X86ISA::PCState &nextPC);
StaticInstPtr fetchRomMicroop(
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/40102
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ifdaf318995f1bb0a75b390bd1c5fde1211c66e62
Gerrit-Change-Number: 40102
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s