Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34499 )
Change subject: mem: Remove #if THE_ISA in the AbstractMemory class.
......................................................................
mem: Remove #if THE_ISA in the AbstractMemory class.
This used to guard the extraction of the endianness when tracing memory
accesses. Since that's now always possible even in NULL_ISA, we don't
need conditional compilation.
Change-Id: Ie5ec76f5b0f27dd4123bc0f0a4c02438bed629ad
---
M src/mem/abstract_mem.cc
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index 79f716c..a708c6c 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -345,17 +345,15 @@
tracePacket(System *sys, const char *label, PacketPtr pkt)
{
int size = pkt->getSize();
-#if THE_ISA != NULL_ISA
if (size == 1 || size == 2 || size == 4 || size == 8) {
ByteOrder byte_order = sys->getGuestByteOrder();
- DPRINTF(MemoryAccess,"%s from %s of size %i on address %#x data "
+ DPRINTF(MemoryAccess, "%s from %s of size %i on address %#x data "
"%#x %c\n", label, sys->getRequestorName(pkt->req->
requestorId()), size, pkt->getAddr(),
size, pkt->getAddr(), pkt->getUintX(byte_order),
pkt->req->isUncacheable() ? 'U' : 'C');
return;
}
-#endif
DPRINTF(MemoryAccess, "%s from %s of size %i on address %#x %c\n",
label, sys->getRequestorName(pkt->req->requestorId()),
size, pkt->getAddr(), pkt->req->isUncacheable() ? 'U' : 'C');
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie5ec76f5b0f27dd4123bc0f0a4c02438bed629ad
Gerrit-Change-Number: 34499
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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