Emily Brickey has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33316 )

Change subject: cpu-o3: convert decode to new style stats
......................................................................

cpu-o3: convert decode to new style stats

Change-Id: Ia67a51f3b2c2d40d8bf09f1636c721550f5e9a23
---
M src/cpu/o3/cpu.cc
M src/cpu/o3/decode.hh
M src/cpu/o3/decode_impl.hh
3 files changed, 62 insertions(+), 80 deletions(-)



diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index a590d1e..47caa67 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -442,7 +442,6 @@
     totalIpc =  sum(committedInsts) / numCycles;

     this->fetch.regStats();
-    this->decode.regStats();
     this->rename.regStats();
     this->iew.regStats();
     this->rob.regStats();
diff --git a/src/cpu/o3/decode.hh b/src/cpu/o3/decode.hh
index 9e26bae..bbbc563 100644
--- a/src/cpu/o3/decode.hh
+++ b/src/cpu/o3/decode.hh
@@ -109,9 +109,6 @@
     /** Returns the name of decode. */
     std::string name() const;

-    /** Registers statistics. */
-    void regStats();
-
     /** Sets the main backwards communication time buffer pointer. */
     void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);

@@ -295,29 +292,32 @@
      */
     bool squashAfterDelaySlot[Impl::MaxThreads];

+    struct DecodeStats : public Stats::Group {
+        DecodeStats(O3CPU *cpu);

-    /** Stat for total number of idle cycles. */
-    Stats::Scalar decodeIdleCycles;
-    /** Stat for total number of blocked cycles. */
-    Stats::Scalar decodeBlockedCycles;
-    /** Stat for total number of normal running cycles. */
-    Stats::Scalar decodeRunCycles;
-    /** Stat for total number of unblocking cycles. */
-    Stats::Scalar decodeUnblockCycles;
-    /** Stat for total number of squashing cycles. */
-    Stats::Scalar decodeSquashCycles;
-    /** Stat for number of times a branch is resolved at decode. */
-    Stats::Scalar decodeBranchResolved;
-    /** Stat for number of times a branch mispredict is detected. */
-    Stats::Scalar decodeBranchMispred;
-    /** Stat for number of times decode detected a non-control instruction
-     * incorrectly predicted as a branch.
-     */
-    Stats::Scalar decodeControlMispred;
-    /** Stat for total number of decoded instructions. */
-    Stats::Scalar decodeDecodedInsts;
-    /** Stat for total number of squashed instructions. */
-    Stats::Scalar decodeSquashedInsts;
+        /** Stat for total number of idle cycles. */
+        Stats::Scalar decodeIdleCycles;
+        /** Stat for total number of blocked cycles. */
+        Stats::Scalar decodeBlockedCycles;
+        /** Stat for total number of normal running cycles. */
+        Stats::Scalar decodeRunCycles;
+        /** Stat for total number of unblocking cycles. */
+        Stats::Scalar decodeUnblockCycles;
+        /** Stat for total number of squashing cycles. */
+        Stats::Scalar decodeSquashCycles;
+        /** Stat for number of times a branch is resolved at decode. */
+        Stats::Scalar decodeBranchResolved;
+        /** Stat for number of times a branch mispredict is detected. */
+        Stats::Scalar decodeBranchMispred;
+ /** Stat for number of times decode detected a non-control instruction
+         * incorrectly predicted as a branch.
+         */
+        Stats::Scalar decodeControlMispred;
+        /** Stat for total number of decoded instructions. */
+        Stats::Scalar decodeDecodedInsts;
+        /** Stat for total number of squashed instructions. */
+        Stats::Scalar decodeSquashedInsts;
+    } stats;
 };

 #endif // __CPU_O3_DECODE_HH__
diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh
index 968bbc7..ce55545 100644
--- a/src/cpu/o3/decode_impl.hh
+++ b/src/cpu/o3/decode_impl.hh
@@ -64,7 +64,8 @@
       commitToDecodeDelay(params->commitToDecodeDelay),
       fetchToDecodeDelay(params->fetchToDecodeDelay),
       decodeWidth(params->decodeWidth),
-      numThreads(params->numThreads)
+      numThreads(params->numThreads),
+      stats(_cpu)
 {
     if (decodeWidth > Impl::MaxWidth)
         fatal("decodeWidth (%d) is larger than compiled limit (%d),\n"
@@ -119,50 +120,32 @@
 }

 template <class Impl>
-void
-DefaultDecode<Impl>::regStats()
+DefaultDecode<Impl>::DecodeStats::DecodeStats(O3CPU *cpu)
+    : Stats::Group(cpu, "decode"),
+    ADD_STAT(decodeIdleCycles, "Number of cycles decode is idle"),
+    ADD_STAT(decodeBlockedCycles, "Number of cycles decode is blocked"),
+    ADD_STAT(decodeRunCycles, "Number of cycles decode is running"),
+    ADD_STAT(decodeUnblockCycles, "Number of cycles decode is unblocking"),
+    ADD_STAT(decodeSquashCycles, "Number of cycles decode is squashing"),
+ ADD_STAT(decodeBranchResolved, "Number of times decode resolved a branch"), + ADD_STAT(decodeBranchMispred, "Number of times decode detected a branch"
+        " misprediction"),
+    ADD_STAT(decodeControlMispred,"Number of times decode detected an"
+        " instruction incorrectly predicted as a control"),
+ ADD_STAT(decodeDecodedInsts, "Number of instructions handled by decode"), + ADD_STAT(decodeSquashedInsts, "Number of squashed instructions handled by"
+        " decode")
 {
-    decodeIdleCycles
-        .name(name() + ".IdleCycles")
-        .desc("Number of cycles decode is idle")
-        .prereq(decodeIdleCycles);
-    decodeBlockedCycles
-        .name(name() + ".BlockedCycles")
-        .desc("Number of cycles decode is blocked")
-        .prereq(decodeBlockedCycles);
-    decodeRunCycles
-        .name(name() + ".RunCycles")
-        .desc("Number of cycles decode is running")
-        .prereq(decodeRunCycles);
-    decodeUnblockCycles
-        .name(name() + ".UnblockCycles")
-        .desc("Number of cycles decode is unblocking")
-        .prereq(decodeUnblockCycles);
-    decodeSquashCycles
-        .name(name() + ".SquashCycles")
-        .desc("Number of cycles decode is squashing")
-        .prereq(decodeSquashCycles);
-    decodeBranchResolved
-        .name(name() + ".BranchResolved")
-        .desc("Number of times decode resolved a branch")
-        .prereq(decodeBranchResolved);
-    decodeBranchMispred
-        .name(name() + ".BranchMispred")
-        .desc("Number of times decode detected a branch misprediction")
-        .prereq(decodeBranchMispred);
-    decodeControlMispred
-        .name(name() + ".ControlMispred")
-        .desc("Number of times decode detected an instruction incorrectly"
-              " predicted as a control")
-        .prereq(decodeControlMispred);
-    decodeDecodedInsts
-        .name(name() + ".DecodedInsts")
-        .desc("Number of instructions handled by decode")
-        .prereq(decodeDecodedInsts);
-    decodeSquashedInsts
-        .name(name() + ".SquashedInsts")
-        .desc("Number of squashed instructions handled by decode")
-        .prereq(decodeSquashedInsts);
+    decodeIdleCycles.prereq(decodeIdleCycles);
+    decodeBlockedCycles.prereq(decodeBlockedCycles);
+    decodeRunCycles.prereq(decodeRunCycles);
+    decodeUnblockCycles.prereq(decodeUnblockCycles);
+    decodeSquashCycles.prereq(decodeSquashCycles);
+    decodeBranchResolved.prereq(decodeBranchResolved);
+    decodeBranchMispred.prereq(decodeBranchMispred);
+    decodeControlMispred.prereq(decodeControlMispred);
+    decodeDecodedInsts.prereq(decodeDecodedInsts);
+    decodeSquashedInsts.prereq(decodeSquashedInsts);
 }

 template<class Impl>
@@ -607,9 +590,9 @@
     //     check if stall conditions have passed

     if (decodeStatus[tid] == Blocked) {
-        ++decodeBlockedCycles;
+        ++stats.decodeBlockedCycles;
     } else if (decodeStatus[tid] == Squashing) {
-        ++decodeSquashCycles;
+        ++stats.decodeSquashCycles;
     }

     // Decode should try to decode as many instructions as its bandwidth
@@ -653,14 +636,14 @@
         DPRINTF(Decode, "[tid:%i] Nothing to do, breaking out"
                 " early.\n",tid);
         // Should I change the status to idle?
-        ++decodeIdleCycles;
+        ++stats.decodeIdleCycles;
         return;
     } else if (decodeStatus[tid] == Unblocking) {
         DPRINTF(Decode, "[tid:%i] Unblocking, removing insts from skid "
                 "buffer.\n",tid);
-        ++decodeUnblockCycles;
+        ++stats.decodeUnblockCycles;
     } else if (decodeStatus[tid] == Running) {
-        ++decodeRunCycles;
+        ++stats.decodeRunCycles;
     }

     std::queue<DynInstPtr>
@@ -684,7 +667,7 @@
                     "squashed, skipping.\n",
                     tid, inst->seqNum, inst->pcState());

-            ++decodeSquashedInsts;
+            ++stats.decodeSquashedInsts;

             --insts_available;

@@ -706,7 +689,7 @@

         ++(toRename->size);
         ++toRenameIndex;
-        ++decodeDecodedInsts;
+        ++stats.decodeDecodedInsts;
         --insts_available;

 #if TRACING_ON
@@ -720,7 +703,7 @@
         if (inst->readPredTaken() && !inst->isControl()) {
             panic("Instruction predicted as a branch!");

-            ++decodeControlMispred;
+            ++stats.decodeControlMispred;

             // Might want to set some sort of boolean and just do
             // a check at the end
@@ -735,10 +718,10 @@
         if (inst->isDirectCtrl() &&
            (inst->isUncondCtrl() || inst->readPredTaken()))
         {
-            ++decodeBranchResolved;
+            ++stats.decodeBranchResolved;

             if (!(inst->branchTarget() == inst->readPredTarg())) {
-                ++decodeBranchMispred;
+                ++stats.decodeBranchMispred;

                 // Might want to set some sort of boolean and just do
                 // a check at the end

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33316
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia67a51f3b2c2d40d8bf09f1636c721550f5e9a23
Gerrit-Change-Number: 33316
Gerrit-PatchSet: 1
Gerrit-Owner: Emily Brickey <[email protected]>
Gerrit-MessageType: newchange
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