Which stats specify the various L1, L2 and L3 hit and miss rates for the AMD GPU?
Stats such as: system.tcp_cntrl0.L1cache.demand_accesses, system.dir_cntrl0.L3CacheMemory.demand_accesses, system.tccdir_cntrl0.directory.demand_accesses are always 0. So, I am wondering whether I am looking at the right cache stats, or is there some issue in the simulation itself, or the stats for GPU related caches are never actually updated (I couldn't find a location where these are updated for the TCP, TCC, Directories. But they are updated for the cpu core pairs.) P.S.: I am using the GCN HSAIL model. Thanks in advance, Marco Bianchi <https://www.avast.com/sig-email?utm_medium=email&utm_source=link&utm_campaign=sig-email&utm_content=webmail&utm_term=icon> Virus-free. www.avast.com <https://www.avast.com/sig-email?utm_medium=email&utm_source=link&utm_campaign=sig-email&utm_content=webmail&utm_term=link> <#DAB4FAD8-2DD7-40BB-A1B8-4E2AA1F9FDF2>
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