Peter Clifton wrote: > There are also different DRC rules on certain objects on inner layers > for some fabs IIRC.
And of course, DRC constraints depend on the thickness of the copper layer. This was a big deal with my big project a few weeks ago. Because the top contains fine pitch SMD components, it could not possibly comply with the rules for the inner layers with 105 µm copper. (Remember my failure to make ignore-DRC work?) In the end, I worked around it by scripted reduction of outer layer line thickness to 1/10 width. Then DRC the inner layers and finally blew up the lines on outer layers to their original width. So, yes, DRC rules should optionally depend on layers. ---<)kaimartin(>--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de -----> not happy with moderation of geda-user mailinglist _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
